• Journal of Broadcast Engineering
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• v.12 no.3
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• pp.250-265
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• 2007

In this paper, a fast intermode decision scheme is introduced by efficiently performing the mode decision using statistical hypothesis testing for hierarchical B-picture coding of SVC, in which much computational power is expensed for combined variable block sizes and hierarchical B-pictures. The hypothesis testing in the proposed method is performed on $16{\times}16\;and\;8{\times}8$ blocks to have early termination for RD computation of all possible modes. The early termination in intermode decision is performed by comparing the pixel values of current blocks and corresponding motion-compensated blocks. The proposed scheme exhibits effective early termination behavior in intermode decision and leads to a significant reduction up to 69% in computational complexity with slight increment in bit amounts. The degradation of visual quality turns out to be negligible in terms of PSNR values.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.5B
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• pp.517-529
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• 2011

In this paper, the parameters of the RTT (Radio Transmission Techniques) for SANET (Ship Ad-hoc NETwork), which is considered for the next generation maritime communication systems, are set up. A channel model has been analyzed based on the practical measured maritime wireless channel in VHF (Very-High Frequency) for SANET system. Also, by considering the frame structure including preamble, guard time and pilots for both single and multi-carrier systems, the BER (Bit Error Rate) performances are evaluated and analyzed in the aspects of channel compensation and channel coding techniques. Based on the simulation results, optimal modulation & coding schemes are suggested for SANET. That is, in single-carrier system by using differential modulation schemes, channel compensation is not necessary. However, channel coding is helpful to achieve additional gain. On the other hand, when 16-QAM modulation is employed in multi-carrier system, the implementation of both channel compensation and channel coding techniques show huge performance gain for various of K values, which are related to different maritime environments, and the rolling effects of wave.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.9
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• pp.1847-1855
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• 2012

A 1V 1.6-GS/s 6-bit flash analog-to-digital converter (ADC) with a clock calibration circuit is proposed. A single track/hold circuit with a bootstrapped analog switch is used as an input stage with a supply voltage of 1V for the high speed operation. Two preamplifier-arrays and each comparator composed of two-stage are implemented for the reduction of analog noises and high speed operation. The clock calibration circuit in the proposed flash ADC improves the dynamic performance of the entire flash ADC by optimizing the duty cycle and phase of the clock. It adjusts the reset and evaluation time of the clock for the comparator by controlling the duty cycle of the clock. The proposed 1.6-GS/s 6-bit flash ADC is fabricated in a 1V 90nm 1-poly 9-metal CMOS process. The measured SNDR is 32.8 dB for a 800 MHz analog input signal. The measured DNL and INL are +0.38/-0.37 LSB, +0.64/-0.64 LSB, respectively. The power consumption and chip area are $800{\times}500{\mu}m2$ and 193.02mW.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.16-23
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• 2010

This paper presents 6bit 250MS/s flash A/D converter which can be applied to wireless communication system. To solve the problem of large power consumption in flash A/D converter, control algorithm by input signal level is used in comparator stage. Also, input voltage range detector circuit is used in reference resistor array to minimize the dynamic power consumption in the comparator. Compared with the conventional A/D converter, the proposed A/D converter shows 4.3% increase of power consumption in analog and a seventh power consumption in digital, which leads to a half of power consumption in total. The A/D converter is implemented in a $0.18{\mu}m$ CMOS 1-poly 6-metal technology. The measured results show 106mW power dissipation with 1.8V supply voltage. It shows 4.1bit ENOB at sampling frequency 250MHz and 30.27MHz input frequency.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.10A
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• pp.962-968
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• 2002

Reliable high-speed data communications over insufficient channel bandwidth is one of the major challenges of harsh wireless environments that push the achievable spectral efficiency far below its theoretical limits. A Quadrature amplitude modulation (QAM) scheme is a userful modulation technique for achieving high data rate transmission without increasing the bandwidth of wireless communication systems. The exact general bit error rate (BER) expression of arbitrary rectangular quadrature amplitude modulation has not yet been derived. In this paper, a generalized closed-form expression for the BER performance of rectangular QAM with Gray code bit mapping is derived and analyzed in the presence of additive white Gaussian noise (AWGN) channel. First we analyze the BER performance of an I-ary PAM scheme. Regular patterns in the k-th bit error probability are observed while developing the EBR expression. From these patterns we provide the exact and general closed-from EBR expression of an I-ary PAM. Then we present a general closed-from expression for BER of an arbitrary IXJ rectangular QAM by considering that this signaling format consists of two PAM scheme, i.e., I-ary and J-ary PAM. A simple approximate BER expression for rectangular QAM is given as well.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.19 no.6
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• pp.109-116
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• 2005

Recently, images/videos have been preferred as the communication media because of their information-implication and easy recognizability. But the amount of their data is so large that it has been the major research area to compress their data. This paper is related to optimization in th image data format, which can make a great effect in performance of data compression and is based on the wavelet transform and JPEG2000. This paper established a criterion to decide the data format to be used in wavelet transform, which is on the bases of the data errors in frequency transform and quantization. This criterion has been used to extract the optimal data format experimentally. The result were(1, 9) of 10-bit fixed-point format for filter coefficients and (9, 7) of 16-bit fixed-point data dormat for wavelet coefficients and their optimality was confirmed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.4
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• pp.778-784
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• 2012

A symmetric block cryptosystem uses an identical cryptographic key at encryption and decryption processes. HIGHT cipher algorithm is 64-bit block cryptographic technology for mobile device that was authorized as international standard by ISO/IEC on 2010. In this paper, block cipher HIGHT algorithm is designed using Verilog-HDL. Four modes of operation for block cipher such as ECB, CBC, OFB and CTR are supported. When continuous message blocks of fixed size are encrypted or decrypted, the desigend HIGHT core can process a 64-bit message block in every 34-clock cycle. The cryptographic processor designed in this paper operates at 144MHz on vertex chip of Xilinx, Inc. and the maximum throughput is 271Mbps. The designed cryptographic processor is applicable to security module of the areas such as PDA, smart card, internet banking and satellite broadcasting.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.9
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• pp.1947-1954
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• 2012

The first frame is encoded in intra mode which generates a larger number of bits. In addition, the first frame is used for the inter mode encoding of the following frames. Thus the initial QP for the first frame affects the first frame as well as the following frames. Traditionally, the initial QP is determined among four constant values only depending on the bpp. In the case of low bit rate video coding, the initial QP value is fixed to 40 regardless of the output bandwidth. Although this initialization scheme is simple, yet it is not accurate enough. An accurate initial QP prediction scheme should not only depends on bpp but also on the complexity of the video sequence and the output bandwidth. In the proposed scheme, we determine the initial QP according to the ratio of the first frame to the total bits allocated to a GOP. To estimate the QP of the allocated bits, Rate-QP model is used. It is shown by experimental results that the new algorithm can predict the optimal initial QP more accurately and generate the PSNR performance better than that of the existing JVT algorithm.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.10
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• pp.2207-2216
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• 2012

Recently, wireless Internet environment with mobile phones and wireless sensor networks with severe resource restrictions have been actively studied. Moreover, an overall security issues are essential to build a reliable and secure sensor network. One of secure solution is to develop a fast cryptographic algorithm for data encryption. Therefore, we propose a 128-bit stream cipher, AA128 which has efficient implementation of software and hardware and is suitable for real-time applications such as wireless Internet environment with mobile phones, wireless sensor networks and Digital Right Management (DRM). AA128 is stream cipher which consists of 278-bit ASR and non-linear transformation. Non-linear transformation consists of Confusion Function, Nonlinear transformation(SF0 ~ SF3) and Whitening. We show that the proposed stream cipher AA128 is faster than AES and Salsa20, and it satisfies the appropriate security requirements. Our hardware simulation result indicates that the proposed cipher algorithm can satisfy the speed requirements of real-time processing applications.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.42 no.4
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• pp.7-14
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• 2005

Recently, images/videos have been preferred as the communication media because of their information-implication and easy recognizability. But the amount of their data is so large that it has been the major research area to compress their data. This paper is related to optimization in the image data format which can make a great effect in performance of data compression and is based on the wavelet transform and JPEG2000. This paper established a criterion to decide the data format to he used in wavelet transform which is on the bases of the data errors in frequency transform and quantization. This criterion has been used to extract the optimal data format experimentally. The result were (1, 9) of 10-bit fixed-point format for filter coefficients and (9, 7) of 16-bit fixed-point data format for wavelet coefficients and their optimality was confirmed.