• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.6 s.336
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• pp.61-66
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• 2005

In this paper, we implemented a impulse generator, the one of the part in UWB(Ultra Wide Band) system using step recovery diode(SRD) and gain-switced semiconductor laser. The impulse generator was consisted of four stages; The first stage used SRD to generate the first impulse for gain switching. The second stage controled current for the suitable gain switching condition. The third was the second impulse generator to generate gaussian pulse. For gain switching, the first impulse was applied to semiconductor laser. In the last stage the gain switched impulse was converted into mono-gaussian pulse. The measured mono-gaussian pulse was 360 psec pulse-width and $-70mV \~ +50mV$ amplitude in time domain. In frequency domain its magnitude and bandwidth was, respectively, -41dBm and 3.6GHz. Accordingly, the impulse generator that we suggested was suitable for UWB systems.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2005.11a
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• pp.77-80
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• 2005

본 논문에서는 ATSC 지상파 디지털 TV 방송방식을 사용하는 등화형 동일채널 중계기(Equalization Digital On-Channel Repeater: EDOCR)에서의 신호처리 시간지연을 최소화하기 위한 전치등화 방법에 대하여 기술하고 결과를 다양한 각도에서 분석한다. 제안된 전치등화 방법은 기준신호인 기저대역 신호와 복조된 중계기 출력신호를 이용하여 전치등화필터계수를 계산하고 펄스성형필터계수와의 컨볼루션을 통해 얻어진 새로운 펄스성형필터를 이용하는 것이다. 새로운 펄스성형필터의 전치 탭 수를 조절함으로써 시간지연을 최소화하고, 마스크필터에 의한 선형왜곡을 보상할 뿐 아니라, 원래 펄스성형필터의 대역 외 방사 특성의 열화를 최소화할 수 있다. 이를 컴퓨터 시뮬레이션 및 제작된 전치등화기를 이용하여 검증하였다.

• The Journal of the Korea Contents Association
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• v.10 no.2
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• pp.72-80
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• 2010

The 1Gbps clock and data recovery (CDR) circuit using the proposed multi-point phase detector (PD) is presented. The proposed phase detector generates up/down signals comparing 3-point that is data transition point and clock rising/falling edge. The conventional PD uses the pulse width modulation (PWM) that controls the voltage controlled oscillator (VCO) using the width of a pulse period's multiple. However, the proposed PD uses the pulse number modulation (PNM) that regulates the VCO with the number of half clock cycle pulse. Therefore the proposed PD can controls VCO preciously and reduces the jitter. The CDR circuit is tested using 1Gbps $2^{31}-1$ pseudo random bit sequence (PRBS) input data. The designed CDR circuit shows that is capable of recovering clock and data at rates of 1Gbps. The recovered clock jitter is 7.36ps at 1GHz and the total power consumption is about 12mW. The proposed circuit is implemented using a 0.18um CMOS process under 1.8V supply.

• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2011.11a
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• pp.942-948
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• 2011

Solid propulsion systems have simple structures compared to other propulsion systems and are suitable for long-term storage. However the systems generally have limits on control of thrust levels. In this paper we introduce controllers for combustion chamber pressure using on-off control techniques which have been known for relatively easy implementation and energy efficiency. For this, we use a simple pressure change model by considering only mass conservation within the combustion chamber and we design a classical controllers and on-off controllers with are Pulse Width Modulation(PWM) and Pulse Width Pulse Frequency Modulation (PWPFM). Then we compare the performance results of the controllers through numerical simulations.

• Korean Journal of Optics and Photonics
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• v.9 no.4
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• pp.270-273
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• 1998

We have demonstrated the wavelength tunable ultrashort pulse fiber ring laser proposed the novel method for measuring the cavity loss from relaxation oscillation frequency and the pump power. To suppress the polarization instability the laser cavity is configured with polarization maintaining fibers and to control the center wavelength a 2.4 nm bandwidth tunable wavelength filter was inserted in the cavity. The laser has 8 picosecond pulse width, 10 GHz repetition rate and 1.2 mW average power in 1530-1560 nm operation range.

• Korean Journal of Optics and Photonics
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• v.10 no.2
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• pp.146-151
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• 1999

We demonstrated a harmonic mode locking scheme that used regeneratie phase modulation to get a high and stable repetition rate in a figure-of-eight fiber soliton laser. From the detected beat spectra of the laser output, a sinusoidal clock freguency tone of 400 MHz, the 96th harmonics of the fundamental mode locking frequency, was extracted with a high Q filter and was used to drive the phase modulator, resulting in stable output of soliton pulse train synchronized with the modulation signal. Generated soliton pulses had FWHM pulsewidth of 930 fs and 3.1 nm linewidth, yielding pulsewidth-bandwidth product of 0.359 that was close to the transform limit. As the modulation frequency always followed the beat frequency of laser modes, stable harmonic mode locking was achieved without the adjustment of the cavity length, which has been commonly required in actively mode-locked lasers.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.7
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• pp.784-790
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• 2012

In this paper, an all-digital CMOS ultra-wideband(UWB) pulse generator for high band(6~10 GHz) frequency range is presented. The pulse generator is designed and implemented with extremely low power and low complexity. It is designed to meet the FCC spectral mask requirement by using Gaussian pulse shaping circuit and control the center frequency by using CMOS delay line with shunt capacitor. Measurement results show that the center frequency can be controlled from 4.5 GHz to 7.5 GHz and pulse width is 1.5 ns and pulse amplitude is 310 mV peak to peak at 10 MHz pulse repetition frequency(PRF). The circuit is implemented in 0.13 um CMOS process with a core area of only $182{\times}65um^2$ and dissipates the average power of 11.4 mW at an output buffer with 1.5-V supply voltage. However, the core consumes only 0.26 mW except for output buffer.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.7
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• pp.1295-1300
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• 2001

This paper presents the system that decreases the Jitter value having an important effect for signal quality in optical disc memory. Level controller of input signal was made and applied to line between format generator and laser beam recorder of DVD. This try means to decrease jitter value without adjustment for many kinds of mastering process. Experimental results show that the jitter value is about 6.9%.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.12
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• pp.2685-2692
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• 2009

We propose pulsed magnetic stimulation below 30W by the AC(60Hz) switching control of leakage transformer primary which has some advantage of cost and size compared to a typical pulsed power supply. Pulse repetition rate is adjusted from 5Hz to 60Hz to control magnetic stimulation output. In this magnetic stimulation, a low voltage open loop control for high voltage discharge circuit is employed to avoid the HV sampling or switching and high voltage leakage transformer is used to convert rectified low voltage pulse to high voltage one. A ZCS(Zero Cross Switch)circuit and a DSP & FPGA are used to control gate signal of SCR precisely. The pulse repetition rate is limited by 60Hz due to the frequency of AC line and a high leakage inductance. The maximum magnetic stimulation output was obtained about 33W at pulse repetition rate of 60Hz, total 40, 80, 120, $160^{\circ}$, SCR gate trigger angle $90^{\circ}$ and total output.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.421-422
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• 2011

본 논문에서는 직렬전압보상을 기반으로 한 직렬 전압 보상을 기반으로 한 자동 전압 조절기(AVR)가 제안된다. 제안된 AVR은 펄스 폭 변조 방식(PWM)의 교류 쵸퍼와 직렬 전압 보상을 위한 변압기로 구성된다. 제안된 AVR에 사용된 교류 쵸퍼는 commutation 문제가 해결되고 직접적인 교류전력변환이 이루어지기 때문에 따로 에너지를 저장할 소자가 필요없다. 따라서 크기와 가격이 줄어드는 장점이 있다. 직렬보상을 위한 변압기 때문에 교류 쵸퍼는 단지 보상을 위해 필요한 전압만 보상하면 되며, 따라서 스위치의 정격이 줄어든다. 제안된 AVR은 보상전압을 입력전압의 동상 또는 역상으로 만들어 줄 수 있기 때문에 입력전압의 증가 시 또는 감소시를 모두 보상할 수 있다. 실험을 통해 제안된 AVR이 입력전압의 증가 혹은 감소 조건에 대해 빠르게 보상해줌을 검증하였다.