• Proceedings of the Korea Multimedia Society Conference
• /
• 2001.11a
• /
• pp.746-751
• /
• 2001

본 논문에서는 디지털 논리회로에 대하여 인터넷을 기반으로 가상교육 및 실험실습이 가능한 멀티미디컨텐츠를 개발하였다. 가상강의를 위한 컨텐츠들은 WMT 기술 및 애니메이션이 포함된 파워포인트 자료로 구성된 화상강의 모들과 개념이해를 위한 플래쉬 및 회로실험을 위한 자바 프로그램들로 구성되었다. 또한 웹 상에서의 가상 실험실을 구현하기 위해 임의의 디지털 논리회로 설계 및 검증을 위한 LogicSim 프로그램과 실험기관과 IC 칩 등을 이용한 임의회로의 가상실험 프로그램인 BreadBoard 등을 개발하였고 웹 상에서의 리포트 작성, 제출 및 검사가 가능한 Report 프로그램, 이론 학습 및 가상실험 보조 유틸리티 프로그램들을 개발하였다.

• Journal of IKEEE
• /
• v.7 no.1 s.12
• /
• pp.1-8
• /
• 2003

In this study, the high performance BCD device structure which satisfies the high voltage and fast switching speed characteristics is devised. Through the process and device simulation, optimal process spec. & device spec. are designed. We adapt double buried layer structure, trench isolation process, n-/p-drift region formation and shallow junction technology to optimize an electrical property as mentioned above. This I.C consists of 20V level high voltage bipolar npn/pnp device, 60V level LDMOS device, a few Ampere level VDMOS, 20V level CMOS device and 5V level logic CMOS.

• Journal of the Korean Society of Industry Convergence
• /
• v.20 no.2
• /
• pp.187-194
• /
• 2017

This study examined the validity and reliability of the thermal safety design, in order to maintain the heat generated from integrated circuit (IC) chips in the converter, condenser, resistor, and transistor (which are considered as heat sources for thermoelectric devices with a printed circuit board) below target levels during the process of developing a control board and a main power board. The study analyzed the heat generation and dissipation characteristics of the entire printed circuit board (PCB) model to examine its thermal safety.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.15 no.3
• /
• pp.527-532
• /
• 2020

In this paper, we presented the results of analysis through EEG measurement for the purpose of checking the frequency band of EEG signals that can be used for personal authentication. The measurement status was divided into the open-eye state and the closed-eye state depending on the presence or absence of an optical task. The data measured in the EEG experiments was divided into seven frequency bands : delta waves, theta waves, alpha waves, SMR waves, mid-beta waves, beta waves and gamma waves to identify the frequency band with the smallest power fluctuation over time. In our results, there was no significant difference between the open-eye state and the closed-eye state, and the SMR waves and mid-beta waves related to human concentration had the smallest fluctuation in power over time, and were a highly reproducible frequency band.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.10
• /
• pp.1-6
• /
• 2008

The holding voltage of the high-voltage MOSFETs in snapback condition is much smaller than the power supply voltage. Such characteristics may cause the latcup-like problems in the Smart Power ICs if these devices are directly used in the ESD (Electrostatic Discharge) power clamp. In this work, a latchup-free design based on the Drain-Extended PMOS (DEPMOS) adopting gate VDD structure is proposed. The operation region of the proposed gate-VDD DEPMOS ESD power clamp is below the onset of the snapback to avoid the danger of latch-up. From the measurement on the devices fabricated using a $0.35\;{\mu}m$ BCD (Bipolar-CMOS-DMOS) Process (60V), it was observed that the proposed ESD power clamp can provide 500% higher ESD robustness per silicon area as compared to the conventional clamps with gate-driven LDMOS (lateral double-diffused MOS).

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.17 no.6
• /
• pp.239-245
• /
• 2016

In this study, a 12 V PWM boost converter was designed with the optimal values of the external components of the power stage was well as the compensation stage for smart electronic applications powered by a battery device. The 12 V boost PWM converter consisted of several passive elements, such as a resistor, inductor and capacitor with a diode, power MOS switch and control IC chip for the control PWM signal. The devices of the power stage and compensation stage were designed to maintain stable operation under a range of load conditions as well as achieving the highest power efficiency. The results of this study were first verified by a simulation in SPICE from calculations of the values of major external elements comprising the converter. The design was also implemented on the prototype PCBboard using commercial IC LM3481 from Texas Instruments, which has a nominal output voltage of 12 V. The output voltage, ripple voltage, and load regulation with the line regulation were measured using a digital oscilloscope, DMM tester, and DC power supply. By configuring the converter under the same conditions as in the circuit simulation, the experimental results matched the simulation results.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.14 no.3
• /
• pp.220-227
• /
• 2009

A self oscillation DC/DC converter which has a very desirable characteristics of the high input-output voltage conversion ratio for high voltage DC power supply applications is proposed in this paper. The proposed converter is composed of one power switch, one inductor, several capacitors and diodes. Compared with conventional high-voltage DC/DC converters, it performs the high- voltage power conversion using the inductor instead of the bulky step-up transformer. Therefore, it can reduce the size of magnetic device and save the cost. Moreover, since it needs no control IC by using self oscillation circuit and has lower voltage stress on output diodes, it features a lower cost, simpler structure and more improved performance. Finally, a comparative analysis and experimental results are presented to show the validity of the proposed converter.

• Journal of IKEEE
• /
• v.16 no.1
• /
• pp.45-50
• /
• 2012

This paper proposes the methodology to estimate the routing congestion of modern IC quickly and accurately at the early stage of the design flow. The occurrence of over-congestion in the routing process causes routing failure which then takes unnecessary time to re-design the physical design from the beginning. The precise estimation of routing congestion at the early design stage leads to a successful physical design that minimizes over-congestion which in turn reduces the total design time cost. The proposed estimation method at the block-level floorplan stage measures accurate routing congestion by using the analyzed virtual interconnections of inter/intra blocks, synthesized virtual power/ground and clock networks.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2002.07a
• /
• pp.338-341
• /
• 2002

A new small size Lateral Trench Electrode Insulated Gate Bipolar Transistor (LTEIGBT) is proposed and fabricated to improve the characteristics of device. The entire electrode of LTEIGBT is placed to trench type electrode. The LTEIGBT is designed so that the width of device is 19$\mu\textrm{m}$. The latch-up current density of the proposed LTEIGBT is improved by 10 and 2 times with those of the conventional LIGET and LTIGBT The forward blocking voltage of the LTEIGBT is 130V. At the same size, those of conventional LIGBT and LTIGBT are 60V and 100V, respectively. Because that the electrodes of the proposed device is formed of trench type, the electric field in the device are crowded to trench oxide. We fabricated He proposed LTEIGBT after the device and process simulation was finished. When the gate voltage is applied 12V, the forward conduction currents of the proposed LTEIGBT and the conventional LIGBT are 80mA and 70mA, respectively, at the same breakdown voltage of 150V,

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.15 no.9
• /
• pp.758-763
• /
• 2002

A new small size Lateral Trench Electrode Insulated Gate Bipolar Transistor (LTEIGBT) is proposed and fabricated to improve the characteristics of device. The entire electrode of LTEIGBT is placed to trench type electrode. The LTEIGBT is designed so that the width of device is 19w. The latch-up current density of the proposed LTEIGBT is improved by 10 and 2 times with those of the conventional LIGBT and LTIGBT. The forward blocking voltage of the LTEIGBT is 130V. At the same size, those of conventional LIGBT and TIGBT are 60V and 100V, respectively. Because the electrodes of the proposed device is formed of trench type, the electric field in the device are crowded to trench oxide. When the gate voltage is applied 12V, the forward conduction currents of the proposed LTEIGBT and the conventional LIGBT are 80mA and 70mA, respectively, at the same breakdown voltage of 150V.