• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.533-536
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• 2005

MAP algorithm is known for optimal decoding algorithm of Turbo codes, but it has very large computational complexity and delay. Generally log-MAP algorithm is used in order to overcome the defect. In this paper we propose modified scheme of the state metric calculation block which can improve the computation speed in log-MAP decoder and simple linear offset unit without using LUT. The simulation results show that the operation speed of the proposed scheme is improved as compared with that of the past scheme.

• Journal of the Institute of Convergence Signal Processing
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• v.1 no.2
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• pp.105-114
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• 2000

In this paper, we propose a bandwidth-efficient channel coding scheme using the turbo trellis-coded modulation with multiple symbol detection. The turbo code can achieve good bit error rates (BER) at low SNR. That comprises two binary component codes and an interleaver. TCM codes combine modulation and coding by optimizing the euclidean distance between codewords. This can be decoded with the Viterbi or the symbol-by- symbol MAP algorithm. But we present the MAP algorithm with branch metrics of the Euclidean distance of the first phase difference as well as the Lth phase difference. The study shows that the turbo trellis-coded modulation with multiple symbol detection can improve the BER performance at the same SNR.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.3C
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• pp.215-223
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• 2003

Turbo codes are selected as FEC(Forward error correction) codes with convolution code in 3GFP(3rd generation partnership project) and 3GPP2 standard of IMT2000. Especially, l/3 turbo code with K=4 is employed for 3GPP standard. In this paper, we proposed a hardware structure of a turbo decoder and denveloped the decoder for 3GPP standard turbo code. For its efficient operation, we design a SOVA decoder by employing a register exchange decoding block and new path metric normalization block as a SISO constituent decoder. In addition, we estimate its performance under MATLAB 6.0 and designed the turbo decoder including control block, input control buffer, SOVA constituent decoder with VHDL. Finally, we synthesized the developed turbo decoder under Synopsys FPGA Express and verified it with ALTERA EPF200SRC240-3 FPGA device.

• KIPS Transactions on Software and Data Engineering
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• v.8 no.7
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• pp.265-274
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• 2019

The reliability test performed when developing the weapon system software is classified into static test and dynamic test. In static test, checking the coding rules, vulnerabilities and source code metric are performed without executing the software. In dynamic test, its functions are verified by executing the actual software based on requirements and the code coverage is measured. The purpose of this static/dynamic test is to find out defects that exist in the software. However, there still exist defects that can't be detected only by the current reliability test on the weapon system software. In this paper, whether defects that may occur in the software can be detected by static test and dynamic test of the current reliability test on the weapon system is analyzed through experiments. As a result, we provide guidance on improving the reliability test of weapon system software, especially the dynamic test.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.1
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• pp.61-66
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• 2001

In this paper, we design high speed Viterbi decoding algorithm which is aimed for Wireless LAN. Wireless LAN transmits data at rate 6∼54 Mbps. This high speed is not easy to implement Viterbi decoder with single ACS. So parallel ACS butterfly structure is to be used and several time-dependent problem is to be solved. We simulate Viterbi algorithm using new branch metric calculating method to save time, and consider trace back algorithm which is adaptable to high speed Viterbi decoder. With simulated, we determine the structure of Viterbi decoder. This architecture is available to high speed and low power Viterbi decoder.

• Journal of the Korea Society of Computer and Information
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• v.29 no.6
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• pp.101-112
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• 2024

In this paper, we present EDF (Event Data Factory), an interactive tool designed to assist event log generation for process mining. EDF integrates various data connectors to improve its capability to assist users in connecting to diverse data sources. Our tool employs low-code/no-code technology, along with graph-based visualization, to help non-expert users understand process flow and enhance the user experience. By utilizing metadata information, EDF allows users to efficiently generate an event log containing case, activity, and timestamp attributes. Through log quality metrics, our tool enables users to assess the generated event log quality. We implement EDF under a cloud-based architecture and run a performance evaluation. Our case study and results demonstrate the usability and applicability of EDF. Finally, an observational study confirms that EDF is easy to use and beneficial, expanding small and medium-sized enterprises' (SMEs) access to process mining applications.

• Journal of Navigation and Port Research
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• v.36 no.5
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• pp.363-370
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• 2012

Recently, International Maritime Organization has been developing e-navigation implementation strategy plan, which is focused on various services for vessel safety navigation. Then, different kinds of software will be developed in maritime area and with this, the quality issues are to be expected becoming more important. In this paper, we adopt software refactoring techniques to reduce the complexity of structure on source code level. It makes software program more effective to understand and modify, without any change of outward behavior. The existing AIS broadcast server program is used as an example for our trial, and calculating coupling and cohesion metric are introduced to analyze the refactoring effect, taking account of the maintainability of IEC/ISO9126 software quality standards.

• The Transactions of the Korea Information Processing Society
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• v.6 no.4
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• pp.932-940
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• 1999

Object-oriented programming is often touted as promoting software reuse. However it is recognized that objected-oriented software often need to be restructured before it can be reused. refactoring is the process that changes the software structure to make it more reusable, easier to maintain and easire to be enhanced wit new functionalities. This paper desirbes experience gained and lessons learned from restructuring OODesigner, a Computer Aided Software Engineering(CASE) tool that supports Objects Modeling Technique(OMT). this tool supports a wide range of features such as constructing object modeler of OMT, managing information repository, documenting class resources, automatical generating C++ and java code, reverse engineering of C++ and Java cod, searching and reusing classes in the corresponding repository and collecting metrics data. although the version 1.x was developed using OMT(i.e the tool has been designed using OMT) and C++, we recognized that the potential maintenance problem originated from the ill-designed class architecture. Thus this version was totally restructured, resulting in a new version that is easier to maintain than the old version. In this paper, we briefly describe its restructuring process, emphasizing the fact that the Refactoring of the tool is conducted using the tool itself. Then we discuss lessons learned from these processes and we exhibit some comparative measurements of the developed version.