Browse > Article

A Study on the hardware implementation of the 3GPP standard Turbo Decoder  

김주민 (인하대학교 전자전기컴퓨터공학부 집적회로연구실)
정덕진 (인하대학교 전자전기컴퓨터공학부 집적회로연구실)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.28, no.3C, 2003 , pp. 215-223 More about this Journal
Abstract
Turbo codes are selected as FEC(Forward error correction) codes with convolution code in 3GFP(3rd generation partnership project) and 3GPP2 standard of IMT2000. Especially, l/3 turbo code with K=4 is employed for 3GPP standard. In this paper, we proposed a hardware structure of a turbo decoder and denveloped the decoder for 3GPP standard turbo code. For its efficient operation, we design a SOVA decoder by employing a register exchange decoding block and new path metric normalization block as a SISO constituent decoder. In addition, we estimate its performance under MATLAB 6.0 and designed the turbo decoder including control block, input control buffer, SOVA constituent decoder with VHDL. Finally, we synthesized the developed turbo decoder under Synopsys FPGA Express and verified it with ALTERA EPF200SRC240-3 FPGA device.
Keywords
Citations & Related Records
연도 인용수 순위
  • Reference
1 On The Tail Effect of SOVA-Based Decoding For Turbo Codes /
[ Lang Lin;Roger S.Cheng ] / Global Telecommunications Conference 1997 GLOBECOM'97 IEEE
2 A Viterbi Algorithm with Soft-Decision Outputs and its Applications /
[ Joachim Hagenauer;Peter Hoeher ] / Proceeding of IEEE GIobecom Conference
3 A comparison of Soft-in/Soft-Out Algorithm for 'Turbo-Detection' /
[ Gerhard Bauch;Volker Franz ] / Proceedings of the International conference on Telecommunication
4 Performance of W-CDMA mobile radio with turbo codes using prime interleaver /
[ A.Shibutani;H.Suda;Y.Yamao ] / Proc. IEEE VTC 2000-Spring
5 The Performance Estimation method of Turbo Internal Interleavers /
[ Taewhan Koh;Jumin Kim;Duckjin Chung ] / Third International conference on Information, communication & signal processing(ICICS)Singapore
6 Improved Decoding with the SOVA in a Parallel Concatenated(Turbo-code)Scheme /
[ Lutz Papke;Patrick Robertson ] / Proceedings of the 1996 IEEE International Conference on Communications
7 A 40Mb/s Soft-Output Viterbi Decoder /
[ O.J.Joeressen;H.Meyr ] / IEEE Journal of Solid-state Circuits
8 /
[] / 3G TS 25.212 v.3.2.0 Technical specificaltion
9 VLSI implementation of SOVA dcoder for 3GPP standard Turbo code with efficient ACS unit /
[ Jumin Kim;Taewhan Koh;Duckjin Chung ] / Third International conference on Information, communication & signal processing(ICICS)Singapore
10 /
[] / Turbo Encoder/Decoder MegaCore Function User Guide, Version 1.0
11 On the Design of Prunable interlevers for Turbo Codes /
[ M.Eroz;A.R.Hammons Jr. ] / Vehicular Technology Conference 1999 IEEE 49th