• 전기의세계
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• v.42 no.7
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• pp.30-44
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• 1993

본 논단에서는 스마트 파워 IC의 개념과 주요 구성 핵심기술인 횡형 전력소자들의 기본구조와 특성을 비교하였으며, 공정에 밀접한 관련있는 전기적 격리기술, 그리고 스마트 파워 칩 구현을 위한 CAD체계에 대해 논의하였다. 또한 자동차 하이사이드 스위치와 모터 제어 및 구동용 스마트 파워 IC의 제품을 중심으로 스마트 파워 IC의 응용분야에 대해 간략하게 살펴보았다. 전자기기에 광범위하게 응용되어 시스템의 고급화, 고신뢰도 및 소형경량화에 중요한 반도체 소자를 포함한 전체 전력 반도체 소자 시장 50억불의 20%를 형성하였다. 최근 스마트 파워 IC의 큰 시트 파워 IC는 자동차 1대당 50개에서 140개까지 소요 예상되리라는 보고도 되고 있다. 스마트 파워 IC는 고내압, 대전류, 고속 스위칭 특성을 갖는 전력소자 및 전기적 격리기술 그리고 설계자동화를 위한 스마트 파워 IC의 구성 요소기술들의 지속적인 발전에 힘입어 더욱 고기능화된 제품개발에 의해 민생용 소비재 분야에서 산업분야까지 현재 보다 더 광범위한 응용이 기대된다.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.318-320
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• 1995

This paper describes the practical implementation of switched reluctance motor drive for a wide range of operation speeds. The angle controller is designed by one-chip microprocessor 8051 for various real time applications. Algorithm to control the speed of SRM and to maintain the speed under the changed load is proposed.

• IEMEK Journal of Embedded Systems and Applications
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• v.16 no.6
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• pp.241-246
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• 2021

In this paper, we developed the evaluation system for the active noise control so that the algorithms can be easily evaluated in real-time on the system. We implemented the active noise controller based on a single-chip with only additional op-amps for signal conditioning because the TMS320C280049 MCU includes almost all necessary peripherals for the active noise controller. Due to the difficulty in testing algorithms on embedded-type hardware unlike in computer simulation, we also developed GUI-based evaluation software which makes it simple to test algorithms on the hardware. Using the GUI software, we can optimize the parameters of the algorithms with ease in a specific noise environment because the parameters can be adjusted in real-time when the algorithm is running on the hardware.

• Journal of Astronomy and Space Sciences
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• v.24 no.4
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• pp.367-378
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• 2007

We present a software which we developed for the multi-purpose CCD camera. This software can be used on the all 3 types of CCD - KAF-0401E ($768{\times}512$), KAF-1602E ($1536{\times}1024$), KAF-3200E ($2184{\times}1472$) made in KODAK Co.. For the efficient CCD camera control, the software is operated with two independent processes of the CCD control program and the temperature/shutter operation program. This software is designed to fully automatic operation as well as manually operation under LINUX system, and is controled by LINUX user signal procedure. We plan to use this software for all sky survey system and also night sky monitoring and sky observation. As our results, the read-out time of each CCD are about 15sec, 64sec, 134sec for KAF-0401E, KAF-1602E, KAF-3200E., because these time are limited by the data transmission speed of parallel port. For larger format CCD, the data transmission is required more high speed. we are considering this control software to one using USB port for high speed data transmission.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.58-67
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• 2009

This paper presents a fully digital gain control system with a new high bandwidth and wide dynamic range power detector for DVB-S2 application. Because the peak-to-average power ratio (PAPR) of DVB-S2 system is so high and the settling time requirement is so stringent, the conventional closed-loop analog gain control scheme cannot be used. The digital gain control is necessary for the robust gain control and the direct digital interface with the baseband modem. Also, it has several advantages over the analog gain control in terms of the settling time and insensitivity to the process, voltage and temperature variation. In order to have a wide gain range with fine step resolution, a new AGC system is proposed. The system is composed of high-bandwidth digital VGAs, wide dynamic range power detectors with RMS detector, low power SAR type ADC, and a digital gain controller. To reduce the power consumption and chip area, only one SAR type ADC is used, and its input is time-interleaved based on four power detectors. Simulation and measurement results show that the new AGC system converges with gain error less than 0.25 dB to the desired level within $10{\mu}s$. It is implemented in a $0.18{\mu}m$ CMOS process. The measurement results of the proposed IF AGC system exhibit 80-dB gain range with 0.25-dB resolution, 8 nV/$\sqrt{Hz}$ input referred noise, and 5-dBm $IIP_3$ at 60-mW power consumption. The power detector shows the 35dB dynamic range for 100 MHz input.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.8C
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• pp.1113-1124
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• 2004

In this paper, we proposed a hardware(H/W) structure which can compress and recontruct the input image in real time operation and implemented it into a FPGA platform using VHDL(VHSIC Hardware Description Language). All the image processing element to process both compression and reconstruction in a FPGA were considered each of them was mapped into H/W with the efficient structure for FPGA. We used the DWT(discrete wavelet transform) which transforms the data from spatial domain to the frequency domain, because use considered the motion JPEG2000 as the application. The implemented H/W is separated to both the data path part and the control part. The data path part consisted of the image processing blocks and the data processing blocks. The image processing blocks consisted of the DWT Kernel fur the filtering by DWT, Quantizer/Huffman Encoder, Inverse Adder/Buffer for adding the low frequency coefficient to the high frequency one in the inverse DWT operation, and Huffman Decoder. Also there existed the interface blocks for communicating with the external application environments and the timing blocks for buffering between the internal blocks The global operations of the designed H/W are the image compression and the reconstruction, and it is operated by the unit of a field synchronized with the A/D converter. The implemented H/W used the 69%(16980) LAB(Logic Array Block) and 9%(28352) ESB(Embedded System Block) in the APEX20KC EP20K600CB652-7 FPGA chip of ALTERA, and stably operated in the 70MHz clock frequency. So we verified the real time operation of 60 fields/sec(30 frames/sec).

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.95-100
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• 2010

LED (Light Emitting Diode) is 85% of the applied energy is converted into heat that is already well known. Lately, LED chips increasing the capacity as result delivered to increase the heat of the LED products and module that directly related to life span and degradation. Thus, in industry the high-power LED chip to control the heat generated during the course of the study and the existing aluminum, copper adhesives, and uses MLC (Metal clad laminate) structures using low-cost FR4 and copper CCL (Copper Clad Laminate) to reduce costs by changing to a study being carried out. In this study, using low-cost CCL Class, mounted 1W LED chip to analyze changes in the thermal resistance. In addition, heat dissipation in the CCL to facilitate a variety of thermal via design outside of the heat generated by the LED chip to control and facilitate the optimal structure of the heat dissipation is suggested.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.4
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• pp.833-838
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• 2011

RFID system in manufacturing industry is used to collect, categorize, and process the data of products. To install RFID system for a large factory, a large amount of wired data communication network is necessary for RS232 communication. If the installed location of RFID system in the factory is changed or extended, a reinstallment is required for the already installed wired data network. A large amount of time/financial reinvestment is necessary for such reinstallation. By using wireless data communication network, however, the initial installation and reinstallation are very simple. In this paper, we implemented a wireless communication system and RFID system. We used the CC1020 chip for wireless communication system and EM4095 chip for RFID system. CC1020 chip enables highly-reliable data communication, and by setting a simple status register, it can switch between transmitting/receiving status and it can choose the desired frequency of either 400 MHz or 900 MHz. Also, Communication range is 50 m, if external antenna is used. EM4095 is a chip for RFID reader system with the carrier frequency of 125 KHz. This chip can implement the reader system by connecting a small number of components. And EM4100 was used for RFID system. EM4100 is read-only type. Atmega128 is used to control a wireless communication system and RFID system. We confirm that the system can communicate without error up to 50 m from sender. In the paper, the circuit diagram and operation program for CC1020 and RFID system are presented. The system used in the experiment is shown in pictures, and the data movement pattern of CC1020 is shown in the diagram, and the performance of each transmission method is presented.

• Journal of the Korean Electrochemical Society
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• v.5 no.3
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• pp.125-130
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• 2002

An attempt was made for the application of porous reticular metal to a heat dissipation material in semiconductor process. For this aim, the electrodeposition of Fe/Ni alloy on the porous reticular Cu has been performed to minimize the thermal expansion mismatch between Cu skeleton and electronic chip. Preliminary tests for the electrodeposition of Fe/Ni alloy layer were conducted by using standard Hull Cell to examine the effect of current density on the composition of alloy layer. It seemed that mass transfer affected significantly the composition of Fe/Ni layer due to anomalous codeposition in the electrodeposition of Fe/Ni alloy. A paddle type stirring bath, which was employed to control the mass transfer of electrolyte in the work, was found to allow the electrodeposition Fe/Ni with a precise composition. result showed that the thermal expansion of Fe/Ni alloy layer was much lower than that of pure copper. From the tests of heat dissipation by using the apparatus designed in the work the heat dissipation material fabricated in the work showed the excellent heat dissipation capacity, namely, more than two times as compared to that of pure copper plate.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.74-80
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• 2009

This paper describes a $2{\sim}6GHz$ CMOS frequency synthesizer that employs only one LC-tank voltage controlled oscillator (VCO). For wide-band operation, optimized LO signal generator is used. The LC-tank VCO oscillating in $6{\sim}8GHz$ provides the required LO frequency by dividing and mixing the VCO output clocks appropriately. The frequency synthesizer is based on a fractional-N phase locked loop (PLL) employing third-order 1-1-1 MASH type sigma-delta modulator. Implemented in a $0.18{\mu}m$ CMOS technology, the frequency synthesizer occupies the area of $0.92mm^2$ with of-chip loop filter and consumes 36mW from a 1.8V supply. The PLL is completed in less than $8{\mu}s$. The phase noise is -110dBC/Hz at 1MHz offset from the carrier.