• Journal of the Microelectronics and Packaging Society
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• v.9 no.4
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• pp.47-53
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• 2002

In this study, two different (NiCuZn)-ferrite which were fabricated by using ultra-fine powders synthesized by the wet processing and conventionally commercialized powder, were investigated and compared each other in terms of the low temperature sintering and electromagnetic properties. Composition of x and w in $(Ni_{0.4-x}Cu_xZn_{0.6})_{1+w}(Fe_2O_4)_{1-w}$ were controlled as 0.2 and 0.03, respectively. The sintering temperature were $900^{\circ}C$ for ultra-fine powders by way of initial heat treatment and $1150^{\circ}C$ for commercialized powders. The (NiCuZn)-ferrite by ultra-fine powders showed love. sintering temperature than that of commercialized powders by over $200^{\circ}C$, and excellent electromagnetic properties such as the quality factor which is a important factor in the multi-layered chip inductor. In addition, characteristics of B-H hysteresis, crystallinity, microstructure and powder morphology were analyzed by a vibrating sample method(VSM), x-ray diffractometer(XRD), transmission electron microscope (TEM) and scanning electron microscope(SEM).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.6
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• pp.1-8
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• 2012

This paper presents a fully-integrated buck converter equipped with packaging inductors. These inductors include parasitic inductances of the bonding wires and lead frames in the package. They have significantly better Q factors than the best on-chip inductors implemented on silicon. This paper also proposes a low-swing gate driver for efficient regulation of high-frequency switching converters. The low-swing driver uses the voltage drop of a diode-connect transistor. The proposed converter is designed and fabricated using a $0.13-{\mu}m$ CMOS process. The fully-integrated buck converter achieves 68.7% and 86.6% efficiency for 3.3 V/2.0 V and 2.8 V/2.3 V conversions, respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.824-825
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• 2015

본 논문은 차량 레이더용 24-GHz/77-GHz 이중 대역 CMOS 저 잡음 증폭기를 제안한다. 이러한 회로는 1.8볼트 전원에서 동작하며, 저 전압 전원 공급에서도 높은 전압 이득과 낮은 잡음지수를 가지도록 설계하였다. 제안한 회로는 TSMC $0.13-{\mu}m$ 혼성신호/고주파 CMOS 공정($f_T/f_{MAX}=120/140GHz$)으로 설계되어 있다. 전체 칩 면적을 줄이기 위해 가능한한 많은 부분에 실제 수동형 인덕터 대신 전송선을 이용하였다. 제안한 회로는 최근 발표된 연구결과에 비해 높은 전압 이득, 낮은 잡음지수 및 작은 칩 크기 특성을 보였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2015.05a
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• pp.837-838
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• 2015

본 논문은 차량 충돌 방지 장거리 레이더용 고 이득 77-GHz CMOS 전력 증폭기를 제안한다. 이러한 회로는 1.8볼트 전원전압 및 77-GHz의 주파수에서 동작한다. 제안한 회로는 TSMC $0.13-{\mu}m$ 혼성신호/고주파 CMOS 공정($f_T/f_{max}=120/140GHz$)으로 설계되어 있다. 전체 칩 면적을 줄이기 위해 가능한한 많은 부분을 실제 수동형 인덕터 대신 전송선을 이용하였다. 제안한 회로는 최근 발표된 연구결과에 비해 가장 높은 전력이득과 가장 작은 칩 면적 특성을 보였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.780-781
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• 2014

본 논문에서는 차량 추돌 방지 단거리 레이더용 고 변환이득 및 저전력 24GHz CMOS 믹서를 제안한다. 이러한 회로는 2볼트 전원전압에서 동작하며, 저 전압 전원 공급에서도 높은 변환 이득과 낮은 잡음지수를 가지도록 설계되어 있다. 제안한 회로는 TSMC $0.13{\mu}m$ 혼성신호/고주파 CMOS 공정($f_T/f_{MAX}=120/140GHz$)으로 설계하였다. 전체 칩 면적을 줄이기 위해 실제 수동형 인덕터 대신 전송선을 이용하였다. 제안한 회로는 최근 발표된 연구결과에 비해 가장 높은 10.96dB의 변환이득, 7.6dBm의 IIP3를 보였고, 가장 적은 5mW의 소비전력 및 $0.2{\times}0.2m^2$의 칩 크기 특성을 보였다.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.1
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• pp.33-38
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• 2017

In this paper, a 4-channel common-cathode VCSEL diode driver array with 3.125 Gb/s per channel operation speed is realized. In order to achieve faster speed of the switching main driver with relatively large transistors, the transmitter array chip consists of a pre-amplifier with active inductor stage and also an input buffer with modified equalizer, which leads to bandwidth extension and reduced current consumption. The utilized VCSEL diode provides inherently 2.2 V forward bias voltage, $50{\Omega}$ resistance, and 850 fF capacitance. In addition, the main driver based upon current steering technique is designed, so that two individual current sources can provide bias currents of 3.0 mA and modulation currents of 3.3 mA to VCSEL diodes. The proposed 4-channel VCSEL driver array has been implemented by using a $0.11-{\mu}m$ CMOS technology, and the chip core occupies the area of $0.15{\times}0.18{\mu}m^2$ and dissipates 22.3 mW per channel.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.5
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• pp.397-400
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• 2018

This paper presents a miniaturized 65 nm CMOS 30~46 GHz wideband amplifier. To minimize the chip area, coupled inductors are used in the matching networks. The measurement shows that the fabricated amplifier exhibits 9.3 dB of peak gain, 16 GHz of 3 dB bandwidth, and 42 % fractional bandwidth. The measured input and output return losses were more than 10 dB at 35.8~46.0 GHz and 28.6~37.8 GHz, respectively. The chip consumes 42 mW at 1.2 V. The measured group delay variation is 19.1 ps within the 3 dB bandwidth and the chip size excluding the pads is $0.09mm^2$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.10 s.101
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• pp.989-994
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• 2005

A MMIC(Monolithic Microwave Integrated Circuit) switch chip using InGaAs/GaAs p-HEMT process has been designed for MSM(Microwave Switch Matrix) of satellite communication system. An absorptive type MMIC switch is adopted for good reflection coefficients performances of input and output ports at both on and off states. And, a quarter wavelength impedance transformer is realized with lumped elements of MIM capacitor and spiral inductor for 3 GHz band to reduce the chip size. This MMIC switch covers the frequency range of $3.2\~3.6\;GHz$. According to the on-wafer measurement, the fabricated MMIC switch with miniature size of $1.6\;mm{\times}1.3\;mm$ demonstrates insertion loss below 2 dB and isolation above 56.8 dB, and the performance coincides with simulation results.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.11
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• pp.880-886
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• 1991

Multi-layered chip inductors were prepared with good magnetic properties by sintering Ni-Zn-Cu ferrites at a lower temperature. A slurry with 49.5mol%Fe$_{2}O_{3}$, 20.5mol% ZnO, 20mol% NiO and 10nol% CuO was cast into tapes with 60-100\ulcorner of thickness with a doctor blade techniques. The tapes were screen-pronted with 100% silver electrodes, layered and pressed at 250kg/cm$^{2}$ and then sintered ant 900$^{\circ}C$ for 2h. Inductance with internal electrodes printed 5, 10, and 15 turns showed 4.9, 15 and 24$\mu$, respectively, at 1MHz.

• 한국정보통신설비학회:학술대회논문집
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• 2004.08a
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• pp.157-159
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• 2004

본 논문에서는 접지면에 형성된 디펙트를 갖는 전송선로 구조인 DGS 등가회로도의 식각된 접지면에 바랙터 다이오드를 접합시켜, 그 영향을 살펴 보았다. 제시된 DGS는 아령 모양의 디펙트로 하였으며, 칩 형태의 집중소자인 인덕터와 캐패시터로 바이어스 회로를 구현하였다. 바랙터 다이오드의 DC 전압 인가에 따른 C값의 변화를 통해서 전송선로의 임피던스를 변화 시켰다. 이에 따른, 가변 전송선로의 파라미터를 추출하고, 구조 및 특성에 관하여 연구하였다.