• Proceedings of the Korea Information Processing Society Conference
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• 2003.11a
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• pp.497-500
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• 2003

본 논문은 계층적 분류기를 제안하여 실시간으로 얼굴 영역을 검출하고, PT(pan-tilt) 카메라를 통해 동적으로 얼굴을 추적할 수 있는 강인한 추적 알고리즘을 구현하고자 한다. 제안된 알고리즘은 분류기 학습, 실시간 얼굴 영역 검출, 추적의 세 단계로 구성된다. 분류기 학습은 AdaBoost 알고리즘을 이용하여, 독특한 얼굴 특징을 추출하는 계층적 분류기를 생성한다. 계층적 분류기는 높은 정확도를 가진 분류기들이 단계적으로 결합됨으로써 우수한 검출 성능으로 수행된다. 실시간 얼굴 영역 검출은 생성된 계층적 분류기를 통해, 빠르고 효율적으로 얼굴 영역을 찾아낸다. 추적은 PT 카메라를 통해 동적으로 검출 영역을 확장시키며, 이전 단계에서 추출된 얼굴 영역의 위치 정보를 이용하여 수행한다. 제안된 알고리즘은 계산의 효율성과 검출 성능을 동시에 증가시키며, 얼굴 검출 수행은 2초당 약 15프레임을 실시간으로 처리한다.

• Journal of KIISE:Software and Applications
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• v.34 no.11
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• pp.991-1000
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• 2007

A new robust approach to detect vehicles in a single frame of traffic scenes is presented. The method is based on the multi-level shadow classification, which has been shown to have the capability of extracting correct shadow shapes regardless of the operating conditions. The rationale of this classification is supported by the fact that shadow regions underneath vehicles usually exhibit darker gray level regardless of the vehicle brightness and illuminating conditions. Classified shadows provide string clues on the presence of vehicles. Unlike other schemes, neither background nor temporal information is utilized; thereby the performance is robust to the abrupt change of weather and the traffic congestion. By a simple evidential reasoning, the shadow evidences are combined with bright evidences to locate correct position of vehicles. Experimental results show the missing rate ranges form 0.9% to 7.2%, while the false alarm rate is below 4% for six traffic scenes sets under different operating conditions. The processing speed for more than 70 frames per second could be obtained for nominal image size, which makes the real-time implementation of measuring the traffic parameters possible.

• The KIPS Transactions:PartB
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• v.13B no.3 s.106
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• pp.255-274
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• 2006

Moving object boundary is very important for the accurate segmentation of moving object. We extract the moving object boundary from the moving object edge. But the object boundary shows broken boundaries so we develop a novel boundary linking algorithm to link the broken boundaries. The boundary linking algorithm forms a quadrant around the terminating pixel in the broken boundaries and searches for other terminating pixels to link in concentric circles clockwise within a search radius in the forward direction. The boundary linking algorithm guarantees the shortest distance linking. We register the background from the image sequence using the stationary background filtering. We construct two object masks, one object mask from the boundary linking and the other object mask from the initial moving object, and use these two complementary object masks to segment the moving objects. The main contribution of the proposed algorithms is the development of the novel object boundary linking algorithm for the accurate segmentation. We achieve the accurate segmentation of moving object, the segmentation of multiple moving objects, the segmentation of the object which has a hole within the object, the segmentation of thin objects, and the segmentation of moving objects in the complex background using the novel object boundary linking and the background automatically. We experiment the algorithms using standard MPEG-4 test video sequences and real video sequences of indoor and outdoor environments. The proposed algorithms are efficient and can process 70.20 QCIF frames per second and 19.7 CIF frames per second on the average on a Pentium-IV 3.4GHz personal computer for real-time object-based processing.

• Journal of the Korea Society of Computer and Information
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• v.18 no.12
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• pp.35-43
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• 2013

This paper suggests a way to implement a system that broadcasts compressed JPEG images obtained from a webcam to multiple users on their smartphones. The system was implemented to maintain a suitable image quality so that things are identifiable while using the minimal amount of data, in order to deliver as many frames as possible to as many users as possible. Also, the suggested way was applied and various tests were done, including on: the performance of the server that provides image information; the performance of the client that receives the image information and displays it on the smartphone; and the max. number of simultaneous users supported by the system. When a broadcasting system is implemented using webcams and smartphones, the results of this paper can be used in estimating the suitable system parameters depending on network performance, including the max. number of simultaneous clients supported, the client smartphone performance required, and the number of frames that can be transmitted per second.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.5C
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• pp.371-381
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• 2005

In this paper, we propose an advanced hardware architecture for the CAVLC entropy encoder/decoder engine for real time video compression. The CAVLC (Context-based Adaptive Variable Length Coding) is a lossless compression method in H.264/AVC and it has high compression efficiency but has computational complexity. The reference memory size is optimized using partitioned storing method and memory reuse method which are based on partiality of memory referencing. We choose the hardware architecture which has the most suitable one in several encoder/decoder architectures for the mobile devices and improve its performance using parallel processing. The proposed architecture has been verified by ARM-interfaced emulation board using Altera Excalibur and also synthesized on Samsung 0.18 um CMOS technology. The synthesis result shows that the encoder can process about 300 CIF frames/s at 150MHz and the decoder can process about 250 CIF frames/s at 140Mhz. The hardware architectures are being used as core modules when implementing a complete H.264/AVC video encoder/decoder chip for real-time multimedia application.

• Journal of IKEEE
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• v.13 no.4
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• pp.50-56
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• 2009

This paper describes the design of image data transmitter for portable media device for Mobile Display Digital Interface standard. The transmitter uses connection lines to 6 to transmit QVGA image data. In this paper, the transmitter is using only 9 packets for image processing and a state-machine based design is adapted for packet processing. The design was verified using FPGA Xilinx virtex4-LX60. Data rate of the transmitter is 363Mbps with six connection lines. The transferring capability is 30 frame of 24bit RGB 500,000 pixel image data per second.

• The Journal of the Acoustical Society of Korea
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• v.28 no.2
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• pp.141-147
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• 2009

This paper presents a new fast algorithm, rotation-based method (RBM), for the reconstruction of 3 dimensional image for cone beam computerized tomography (CB CT) system. The system used cone beam has less exposure time of radioactivity than fan beam. The Three-Pass Shear Matrices (TPSM) is applied, that has less transcendental functions than the one-pass shear method to decrease a time of calculations in the computer. To evaluate the quality of the 3-D images and the time for the reconstruction of the 3-D images, another 3-D images were reconstructed by the radon transform under the same condition. For the quality of the 3-D images, the images by radon transform was shown little good quality than REM. But for the time for the reconstruction of the 3-D images REM algorithm was 35 times faster than radon transform. This algorithm offered $4{\sim}5$ frames a second. It meant that it will be possible to reconstruct the 3-D dynamic images in real time.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.12
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• pp.93-101
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• 2007

Small area and low power implementation are important requirements for various multimedia processing hardware, especially for mobile environment. This paper presents a hardware architecture of H.264/AVC Intra Prediction module aiming on small area and low power. A single arithmetic unit was shared and processed sequentially for all mode decisions and computations to predict an image frame. As a result, we could get smaller area and smaller memory size compared to other existing implementations. The proposed architecture was verified using the Altera Excalibur device, and the implemented hardware has been described in Verilog-HDL and synthesized on Samsung STD130 0.18um CMOS Standard Cell Library using Synopsys Design Compiler. The synthesis result was about 11.9K logic gates and 1078 byte internal SRAM and the maximum operating frequency was 107Mhz. It consumes 879,617 clocks to process one QCIF frame, which means it can process 121.5 QCIF$(176\times144)$ frames per second, therefore it shows that it can be used for real time H.264/AVC encoding of various multimedia applications.

• Journal of Internet Computing and Services
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• v.17 no.1
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• pp.55-64
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• 2016

Existing Android applications for streaming video in real time are dependent on the codec, which composes the encoding function, and the version of Android operating system. Also, for streaming video in real time, most applications should be connected with a separate desktop PC. To overcome these disadvantages, we propose a new application, which records and streams video in real time. Specifically, the proposed application uses the flash video file format, which is the common media file format supported by various versions of Android operating system. Through experiments, we show that it is possible for the proposed application to record the video screens more than 20 frames per second and to stream it in real time while using the existing video encoding methods.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.12C
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• pp.1182-1191
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• 2003

In this paper, we propose a new hardware architecture for integer transform, quantizer, inverse quantizer, and inverse integer transform of a new video coding standard H.264/JVT. We describe the algorithm and derive hardware architecture emphasizing the importance of area for low cost and low power consumption. The proposed architecture has been verified by PCI-interfaced emulation board using APEX-II Alters FPGA and also by ASIC synthesis using Samsung 0.18 um CMOS cell library. The ASIC synthesis result shows that the proposed hardware can operate at 100 MHz, processing more than 1,300 QCIF video frames per second. The hardware is going to be used as a core module when implementing a complete H.264 video encoder/decoder ASIC for real-time multimedia application.