• Title/Summary/Keyword: 직렬 적층

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Design of Three-stacked Microstrip Patch Array Antenna Having Tx/Rx Feeds For Satellite Communication (위성통신을 위한 송수신 겸용 삼중 적층 마이크로스트립 패치 배열 안테나 설계)

  • Park, Ung-Hee;Noh, Haeng-Sook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.5
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    • pp.853-859
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    • 2007
  • This paper presents a microstrip patch array antenna having transmission feed and reception feed for satellite communication in the Ku band. In this paper, the element of the patch array antenna is a three-stacked structure consisting of one radiation patch and two parasitic patches for high gain and wide bandwidth characteristics. To obtain higher gain, the unit elements are expanded into a $1{\times}8$ may using a mixture of series and parallel feeds. The proposed antenna has horizontal polarization for the Rx band and vertical polarization for the Tx band. To verify the practicality of this antenna, we fabricated a three-stacked patch array antenna and measured its performance. The gain of the array antenna in the Rx and Tx bands exceeds 17 and 18 dBi, respectively. The impedance bandwidth is over 10 % in both bands. The cross-polarization level is below -25 dB, and the sidelobe level is below -9.4 dB.

PCB Plane Model Including Frequency-Dependent Losses for Generic Circuit Simulators (범용 회로 시뮬레이터를 위한 손실을 반영한 PCB 평판 모형)

  • Baek, Jong-Humn;Jeong, Yong-Jin;Kim, Seok-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.6
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    • pp.91-98
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    • 2004
  • This paper proposes a PCB plane model for generic SPICE circuit simulators. The proposed model reflects two frequency-dependent losses, namely skin and dielectric losses. After power/ground plane pair is divided into arrays of unit-cells, each unit-cell is modeled using a transmission line and two loss models. The loss model is composed of a resistor for DC loss, series HL ladder circuit for skin loss and series RC ladder circuit for dielectric loss. To verify the validity of the proposed model, it is compared with SPICE ac analysis using frequency-dependent resistors. Also, we show that the estimation results using the proposed model have a good correlation with that of VNA measurement for the typical PCB stack-up structure of general desktop PCs. With the proposed model, not only ac analysis but also transient analysis can be easily done for circuits including various non-linear/linear devices since the model consists of passive elements onl.

Design and Analysis of 45°-Inclined Linearly Polarized Substrate Integrated Waveguide(SIW) Slot Sub-Array Antenna for 35 GHz (45도 선형 편파 발생용 SIW 슬롯 Sub-Array 안테나 설계 및 해석)

  • Kim, Dong-Yeon;Nam, Sangwook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.4
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    • pp.357-365
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    • 2013
  • The 4 by 4 series slot sub-array antenna is proposed using substrate integrated waveguide(SIW) technology for 35 GHz of Ka band application. The proposed antenna is realized with multi-layered structure for compact size and easy integration features. 4 by 4 radiating slots are arrayed on top PCB with equal spacing and the feeding SIWs are arranged on middle and bottom PCBs for uniform power distribution. The multi-layered antenna is realized using RT/Duroid 5880 that has dielectric constant of 2.2 and the total antenna size is $750.76mm^2$. The individual parts such as radiators and feeding networks are simulated using full-wave simulator CST MWS. Furthermore, the total sub-array antenna also fabricated and measured the electrical performances such as impedance bandwidth under the criteria of -10 dB(490 MHz), maximum gain(18.02 dBi), sidelobe level(SLL)(-11.0 dB), and cross polarization discrimination (XPD)(-20.16 dB).

Segmented 평관형 SOFC에서 다공성 $MgAl_2O_4$ 지지체 제조 및 특성

  • Park, Seong-Tae;Choe, Byeong-Hyeon;Lee, Dae-Jin;Kim, Bit-Nam;Ji, Mi-Jeong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.273-273
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    • 2009
  • 고체산화물 연료전지 (Solid Oxide Fuel Cell, 이하 SOFC)는 제조형태에 따라 크게 평판형과 원통형으로 구분할 수 있다. 단위면적당 출력 효율이 높은 평판형의 장점과 원통형의 밀봉이 용이한 장점을 동시에 가지는 평관형 형태로 지지체를 제작하였으며, 셀의 배치를 평면상 직렬로 연결하는 다전지식으로 구성함으로 전극의 길이나, 셀 간격을 기존 평판형이나 원통형에 비해 대폭 감소시켜 단위면적당 전압 및 출력효율을 높이고자 하였다. Segmented 평관형 지지체의 소재로는 연료전지의 성능 특성에 관여하지 않으며 열사이클 저항성과 기계적 강도가 우수한 spinel구조를 가지는 $MgAl_2O_4$를 선정하였다. 연료가스의 원활한 공급이 가능하도록 carbon을 기공 전구체로 사용하여 압출성형하였으며 건조과정에서 crack이 생기지 않는 공정을 확립한 후 $1400^{\circ}C$ 에서 소결하였다. 제조된 지지체는 수은침투법과 3점 굽힘 강도법으로 기공율과 기계적 강도를 각각 측정하였다. Anode를 스크린 프린팅법으로 지지체 위에 적층한 후 미세구조를 확인하였고 이를 바탕으로 다공성이며 기계적 강도를 가지고 음극과의 반응이 없는 우수한 지지체를 제조할 수 있었다.

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Solution-processed Polymer Tandem Cells Using Nano Crystalline $TiO_2$ Interlayer ($TiO_2$ 나노 입자의 중간 전극을 이용한 직렬 적층형 유기 태양 전지)

  • Chung, Won-Suk;Ju, Byeong-Kwon;Ko, Min-Jae;Park, Nam-Gyu;Kim, Kyung-Kon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.444-444
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    • 2008
  • For the polymer tandem cell, simple and advantaged solution-based method to electron transport intermediate layer is presented which are composed $TiO_2$ nanoparticles. Device were based on a regioregular Poly(3-hexylthiophene)(P3HT) and [6,6]-phenyl $C_{61}$ butyric acid methyl ester($PC_{60}BM$) blend as a donor and acceptor bulk-heterojunction. For the middle electrode interlayer, the $TiO_2$ nanoparticles were well dispersed in ethanol solution and formed thin layer on the P3HT:PCBM charge separation layer by spin coating. The layer serves as the electron transport layer and divides the polymer tandem solar cell. The open-circuit voltage (Voc) for the polymer tandem solar cells was closed to the sum of those of individual cells.

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Poly Si Buffer-layer 도입에 의한 실리콘 양자점층 두께 증가에 따른 실리콘 양자점 태양전지 효율 향상

  • Baek, Hyeon-Jeong;Park, Jae-Hui;Kim, Tae-Un;Kim, Gyeong-Jung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.354-354
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    • 2012
  • 실리콘 양자점 태양전지는 실리콘이 nm 크기의 양자점으로 될 경우 밴드갭이 증가하여 태양광 중의 가시광선을 광전변환에 활용함으로써 효율을 향상시키는 차세대 태양전지이다. 그러나 실리콘 양자점이 SiO2 매질 내에 분포하므로 양자점층의 두께가 증가할 경우 박막의 직렬저항이 증가하여 일정 두께 이상이 되면 효율이 감소하는 결과를 가져온다. 본 연구에서는 두께증가에 따른 효율저하 문제를 해결하기 위해 다결정 실리콘으로 이루어진 완충층을 도입 하였다. 이를 위해 본 연구에서는 두 가지 형태의 실리콘 양자점 태양전지를 제작하여 광전변환 특성을 비교하였다. 첫 번재 구조는 B이 도핑된 단일 실리콘 양자점층 태양전지이다. 양자점층은 2 nm SiOx 층과 2 nm SiO2 층을 적층한 후 $1,100^{\circ}C$에서 20분간 질소 분위기에서 급속 열처리하여 제작하였다. 실리콘 양자점 층의 두께를 40 nm에서 200 nm까지 변화시키면서 효율을 측정한 결과 100 nm 정도에서 효율이 감소하기 시작하였다. 이러한 효율감소는 양자점층의 저항 증가에 따른 전류감소에 의함이 확인되었다. 이와는 대조적으로 실리콘 양자점 층의 저항을 줄이기 위해 실리콘 양자점층 내에 50 nm 간격으로 10 nm 두께의 B이 도핑된 다결정 실리콘층을 배치하는 실리콘 양자점 태양전지를 개발하였다. 이러한 실리콘 양자점 층의 두께를 증가시킬 경우 효율이 지속적으로 증가함을 관찰하였다. 이러한 두 가지 형태의 양자점층을 이차이온질량분석법으로 분석한 결과 단일 실리콘 양자점층의 경우 두께가 약 70 nm 정도부터 이온빔 스퍼터링에 의한 저항증가에 따른 대전현상 (charging)이 관찰되었으나 다결정 실리콘 층이 배치된 실리콘 양자점층에서는 전혀 대전현상이 발생하지 않았다. 이는 다결정 실리콘 층이 캐리어를 이동시키는 매개체 역할을 하는 것으로 해석될 수 있다.

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A Study on the Development of Superheater Using High-Frequency Resonant Inverter for Induction Heating (유도가열용 고주파 공진형 인버터를 이용한 과열증기 발생장치 개발에 관한 연구)

  • 신대철;권혁민;김기환;김용주
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.2
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    • pp.119-125
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    • 2004
  • This paper is described the indirect induction heated boiler system and induction heated hot air producer using the voltage-fed series resonant high-frequency inverter which can operate in the frequency range from 20〔KHz〕 to 50〔KHz〕. A specially designed Induction heater, which is composed of laminated stainless assembly with many tiny holes and interconnected spot welding points between stainless plates, is inserted into the ceramic type vessel with external working coil. This working coil is connected to the resonant inverter. In the induction heater, it's primary heating section creates low-pressure saturated steam and secondary heating section generates heat distribution evaporating fluid from the turbulence fluid which is flowing through the vessel. The operating performances of this unique appliance in next generation and its effectiveness are evaluated and discussed from the practical point of view.

Indictor Library for RF Integrated Circuits in Standard Digital 0.18 μm CMOS Technology (RF 집적회로를 위한 0.18 μm CMOS 표준 디지털 공정 기반 인덕터 라이브러리)

  • Jung, Wee-Shin;Kim, Seung-Soo;Park, Yong-Guk;Won, Kwang-Ho;Shin, Hyun-Chol
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.5 s.120
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    • pp.530-538
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    • 2007
  • An inductor library for efficient low cost RFIC design has been developed based on a standard digital 0.18 ${\mu}m$ CMOS process. The developed library provides four structural variations that are most popular in RFIC design; standard spiral structure, patterned ground shield(PGS) structure to enhance quality factor, stacked structure to enable high inductance values in a given silicon area, multilayer structure to lower series resistance. Electromagnetic simulation, equivalent circuit, and parameter extraction processes have been verified based on measurement results. The extensive measurement and simulation results of the inductor library can be a great asset for low cost RFIC design and development.

Performance Evaluation of Switching Amplifier in Micro-positioning Systems with Piezoelectric Actuator (마이크로 변위제어 시스템의 압전 액츄에이터 구동을 위한 스위칭 증폭기 성능 분석)

  • Park, Joung-Hu;Baek, Jong-Bok;Cho, Bo-Hyung;Choi, Sung-Jin
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.1
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    • pp.62-71
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    • 2009
  • In this paper, an improved drive method of piezoelectric PZT stack actuator for micro-positioning system is proposed and the performances are evaluated. This type of amplifier is based on switching technology efficiently handling the arbitrary regenerative energy from the piezoelectric actuator. The conventional voltage-feedback control method has the THD of -32dB (${\approx}2.5%$) with 100mHz sinusoidal reference, which means that the positioning performance in linearity degrades due to the hysteretic relationship between actuator voltage and the displacement. This paper proposed an improved charge-controlling method, which utilizes differential information of charge reference instead of integrating the actuator's current. The current waveform has THD under -40dBV (=1%) and the displacement waveform nearly -52dB (${\approx}0.25%$), which means that the positioning performance is very excellent. Finally, another method of the displacement feedback control has better performance than the voltage method, however there exists a limitation in performance of the system.

Thickness Effect of SiOx Layer Inserted between Anti-Reflection Coating and p-n Junction on Potential-Induced Degradation (PID) of PERC Solar Cells (PERC 태양전지에서 반사방지막과 p-n 접합 사이에 삽입된 SiOx 층의 두께가 Potential-Induced Degradation (PID) 저감에 미치는 영향)

  • Jung, Dongwook;Oh, Kyoung-suk;Jang, Eunjin;Chan, Sung-il;Ryu, Sangwoo
    • Journal of the Microelectronics and Packaging Society
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    • v.26 no.3
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    • pp.75-80
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    • 2019
  • Silicon solar cells have been widely used as a most promising renewable energy source due to eco-friendliness and high efficiency. As modules of silicon solar cells are connected in series for a practical electricity generation, a large voltage of 500-1,500 V is applied to the modules inevitably. Potential-induced degradation (PID), a deterioration of the efficiency and maximum power output by the continuously applied high voltage between the module frames and solar cells, has been regarded as the major cause that reduces the lifetime of silicon solar cells. In particular, the migration of the $Na^+$ ions from the front glass into Si through the anti-reflection coating and the accumulation of $Na^+$ ions at stacking faults inside Si have been reported as the reason of PID. In this research, the thickness effect of $SiO_x$ layer that can block the migration of $Na^+$ ions on the reduction of PID is investigated as it is incorporated between anti-reflection coating and p-n junction in p-type PERC solar cells. From the measurement of shunt resistance, efficiency, and maximum power output after the continuous application of 1,000 V for 96 hours, it is revealed that the thickness of $SiO_x$ layer should be larger than 7-8 nm to reduce PID effectively.