• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.11
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• pp.6-12
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• 2010

A sigma-delta modulator based class-D audio amplifier is presented. Parallel digital input is serialized to two-bit output by a fourth-order digital sigma-delta noise shaper. The output of the digital sigma-delta noise shaper is applied to a fourth-order analog sigma-delta modulator whose three-level output drives power switches. The pulse density modulated (PDM) output of the power switches is low-pass filtered by an LC-filter. The PDM output of the power switches is fed back to the input of the analog sigma-delta modulator. The first integrator of the analog sigma-delta modulator is a hybrid of continuous-time (CT) and switched-capacitor (SC) integrator. While the sampled input is applied to SC path, the continuous-time feedback signal is applied to CT path to suppress the noise of the PDM output. The class-D audio amplifier is fabricated in a standard $0.13-{\mu}m$ CMOS process and operates for the signal bandwidth from 100-Hz to 20-kHz. With 4-${\Omega}$ load, the maximum output power is 18.3-mW. The total harmonic distortion plus noise and dynamic range are 0.035-% and 80-dB, respectively. The modulator consumes 457-uW from 1.2-V power supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.4
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• pp.34-41
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• 2003

A new technique for detecting parametric faults in mixed signal circuits is proposed Pseudo-random sequence from linear feedback shift register(LFSR) is fed to circuit-under-test (CUT) as stimulus and wavelets are used to compact the transient response under this stimulus into a small number of signature. Wavelet based scheme decomposes the transient response into a number of signal in different frequency bands. Each decomposed signal is compacted into a signature using digital integrator. The digital pulses from LFSR, owing to its pseudo-randomness property, are almost uniform in frequency domain, which generates multi-frequency response when passed through CUT. The effectiveness of this technique is demonstrated in our experimental results.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.4 s.316
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• pp.61-66
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• 2007

PID control is windely used to control stable processes, however, its application to integrating processes is less common. In this paper we proposed a simple PID controller tuning method for integrating processes with time delay to meet a stable specification. With the proposed PID tuning method, we can obtain stable integrating processes using PD controller in inner feedback loop and a loop transfer function with desired stable specification. This guarantees bout robustness and performance. Simulation examples are given to show the good performance of the proposed tuning method to other methods.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.2
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• pp.163-169
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• 2000

From the viewpoint of the cost effective design of power conversion systems, it is very important to fully u utilize the CillTent capacity of power devices over all circumstances. Therefore this paper deals with the l practical design of digital CillTent controller to meet the requirements of fast and overshoot free control r response over the varying control voltage bOlmds, the accompanied computational delay, and the system U W1certainties. The proposed controller consists of high gain PI control schemes using both the conditional i integrator and the modified delay compensator. The simulation and experimental results show the validity of t the proposed controller.

• Proceedings of the KIPE Conference
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• 2016.11a
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• pp.95-96
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• 2016

본 논문은 독립 운전 모드에서 전압 고조파 보상을 위한 비례 다중 공진 제어 기반의 전압 제어에 대해 다루고 있다. 독립 운전 모드에서 인버터는 계통과의 연계 없이 전체 지역적 부하의 수요를 담당해야 하기 때문에 전압원으로서 정의된다. 그런데 이때 부하가 불평형 또는 비선형 부하인 경우 역상차, 영상차 또는 특정 고조파 전류가 발생하며 이로 인해 출력 전압이 왜곡된다. 본 논문에서는 앞서 언급한대로 전압 고조파 보상을 위해 흔히 사용되는 비례적분 제어기 대신 고조파 보상 제어의 단순화를 위해 비례 공진 제어기를 사용하였다. 하지만 이와 같은 비례 공진 제어를 실용적인 텀으로서 추가될 경우 전압 매그니튜드 추종 에러가 발생하게 되므로 본 논문에서는 추가적으로 실용적인 비례 공진 제어기가 갖는 단점을 극복하고자 비례 적분 기반의 간단한 전압 회복 기법에 대해 제안하며 제안된 제어 방식은 PSiM 시뮬레이션과 실험을 통해 입증되었다.

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2803-2806
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• 2003

In this paper considers the design of the effective controllers for the plant with an integrator and a long dead time. The structure of the new DTC(Dead Time Compensator) that has an additive filter is proposed. Our DTC shows the improved performance in set-point response and disturbance rejection. Especially the bad effect of the long dead time in the disturbance rejection is fairly reduced by using the additive filter. illustrative examples are provided to show the availability of the proposed controller.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.11-12
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• 2012

본 논문에서는 2차 일반화 적분기(Second-Order Generalized Integrator - SOGI)를 이용한 계통 위상각 검출시에 필수 정보인 계통 주파수를 퍼지제어를 통하여 빠르게 추정하고자 한다. DSOGI-FLL의 기존의 방법과는 다르게 비선형 특성이 강한 주파수 동기화의 동특성 모델에 퍼지제어를 적용함으로써 선형화 오차를 줄이고 계통 주파수 추정을 빠르게 할 수 있다. 제안된 방법은 시뮬레이션을 통하여 우수한 성능이 입증된다.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.13 no.4
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• pp.14-20
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• 1999

This paper presents a design techniques for an electronic ballast of HID lamps. An electronic ballast for HID lamps usually employs a high-frequeocy resonant inverter and voltage-to-frequency converter to control the outpIt and a half-bridge and series resonant circuit are chosen for the ballast First, to design PI controller, the inverter with V/F converter is modeled with a transfer function and the controller PI gains are determined. This paper shows that an integral controller is only needed to control the current. Second, a se1f-feedback controller is proposed. This structure, simple and robust, is analyzed and a feedback gain is determined by using the inverter model. Experirrental system is built with a commercial 250W high pressure sodium lamp and the results show a validity of the proposed ballast and the total efficiency is increased by 5%.

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2811-2814
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• 2003

본 논문에서는 Sub-nano 수준의 위치정밀도와 분해능을 갖는 Piezo actuator 의 제어기 설계를 목적으로 하였다. 이산 시간 상태 공간에서의 Piezo actuator를 이용한 1 축 스테이지 드라이브 시스템 SISO 제어기를 설계하였다. Piezo actuator 의 소재 자체의 특성으로는 Hysteresis 가 있으며, 이는 정상상태에서 Piezo actuator 의 위치 오차를 발생하는 주요 원인이 된다. 제어기의 설계는 극점 배치 방법을 기본으로 하여 Hysteresis 에 대한 보상을 목적으로 적분제어방식과 외란 추정기를 각각 적용하였다. 모의실험을 통하여 제어기의 설계 및 시뮬레이션 하였으며, Hysteresis 에 대한 보상이 이루어짐을 보았고, 실험을 통하여 이를 증명하였다.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.43 no.6 s.312
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• pp.48-60
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• 2006

This paper presents three PWM modulators using CMOS OTAs. They consist of a ramp integrator and current-tunable Schmitt triggers. Prototype circuits built using discrete components exhibited that their duty cycles are linearly controllable. The proposed modulators can be easily fabricated in a monolithic IC, because they have a simple structure.