• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.12
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• pp.91-96
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• 2011

In this paper, a low-power direct-conversion transmitter based on current-mode operation, which satisfies the IEEE 802.15.4 standard, is proposed and implemented in a $0.13{\mu}m$ CMOS technology. The proposed transmitter consists of DACs, LPFs, variable gain I/Q up-conversion mixer, a divide-by-two circuit with LO buffer, and a drive amplifier. By combining DAC, LPF, and variable gain I/Q up-conversion mixer with a simple current mirror configuration, the transmitter's power consumption is reduced and its linearity is improved. The drive amplifier is a cascode amplifier with gain controls and the 2.4GHz I/Q differential LO signals are generated by a divide-by-two current-mode-logic (CML) circuit with an external 4.8GHz input signal. The implemented transmitter has 30dB of gain control range, 0dBm of maximum transmit output power, 33dBc of local oscillator leakage, and 40dBc of the transmit third harmonic component. The transmitter dissipates 10.2mW from a 1.2V supply and the die area of the transmitter is $1.76mm{\times}1.26mm$.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.10
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• pp.118-125
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• 2007

The lightning surge and switching surge could be injected to the underground distribution line through the riser pole in the mixed distribution line of overhead and underground. These surges travel along the cable and are reflected at the end of cable. It can be doubled and affecting underground distribution facilities. It was made a underground distribution model representing KEPCO's distribution system. It was measured propagation characteristics by applying lightning surges to this underground distribution model. Meanwhile, this system was simulated with ATP-EMTP and compared these real test results md tuned up the EMTP parameters. EMTP simulation results showed that accord with real test result by adjusting the cable insulation permitivity, arrester characteristics, surge wave shape.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.6
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• pp.635-642
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• 2004

In electric motor coaches. the rolling stocks move by the adhesive effort between rail and driving wheel. Generally, the adhesive effort is defined by the function of both the weight of electric motor coach and the adhesive effort between rails and driving wheel. The characteristics of adhesive effort is strongly affected by the conditions between rails and driving wheel. When the adhesive effort decreases suddenly, the electric motor coach has slip phenomena. This paper proposes a re-adhesion control based on disturbance observer and sensor-less vector control. The numerical simulation and experimental results point out that the proposed readhesion control system has the desired driving wheel torque response for the tested bogie system of electric coach. Based on this estimated adhesive effort, the re-adhesion control is performed to obtain the maximum transfer of the tractive effort.

• Journal of IKEEE
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• v.23 no.4
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• pp.1257-1264
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• 2019

A 3-GSymbol/s/lane transceiver, which supports the mobile industry processor interface (MIPI) C-physical layer (PHY) specification version 1.1, is proposed. It performs channel mismatch correction to improve the signal integrity that is deteriorated by using three-level signals over three channels. The proposed channel mismatch correction is performed by detecting channel mismatches in the receiver and adjusting the delay times of the transmission data in the transmitter according to the detection result. The channel mismatch detection in the receiver is performed by comparing the phases of the received signals with respect to the pre-determined data pattern transmitted from the transmitter. The proposed MIPI C-PHY receiver is designed using a 65 nm complementary metal-oxide-semiconductor (CMOS) process with 1.2 V supply voltage. The area and power consumption of each transceiver lane are 0.136 ㎟ and 17.4 mW/GSymbol/s, respectively. The proposed channel mismatch correction reduces the time jitter of 88.6 ps caused by the channel mismatch to 34.9 ps.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.24 no.2
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• pp.139-145
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• 2024

This paper presents the design of a voltage controlled oscillator (VCO) which is one of the key building blocks in modern wireless communication systems with small VCO gain (K_vco) variation. To compensate conventional large K_vco variation, a series varactor bank has been added to the conventional LC-tank with parallel capacitor bank array. And also, in order to achieve excellent phase noise performance while maintaining wide tuning range, a mixed coarse/fine tuning scheme(series varactor array and parallel capacitor array) is chosen. The switched varactor array bank is controlled by the same digital code for switched capacitor array without additional digital circuits. For use at a low voltage of 1.2V, the proposed current reference circuit in this paper used a current reference circuit for safety with the common gate removed more safely. Implemented in a TSMC 0.13㎛ CMOS RF technology, the proposed VCO can be tuned from 4.4GH to 5.3GHz with the K_vco (VCO gain ) variation of less than 9.6%. While consuming 3.1mA from a 1.2V supply, the VCO has -120dBc/Hz phase noise at 1MHz offset from the carrier of the 5.3 GHz.

• Journal of IKEEE
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• v.2 no.2 s.3
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• pp.278-284
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• 1998

This paper describes a l0b CMOS A/D converter (ADC) for HDTV applications. The proposed ADC adopts a typical multi-step pipelined architecture. The proposed circuit design techniques are as fo1lows: A selective channel-length adjustment technique for a bias circuit minimizes the mismatch of the bias current due to the short channel effect by supply voltage variations. A power reduction technique for a high-speed two-stage operational amplifier decreases the power consumption of amplifiers with wide bandwidths by turning on and off bias currents in the suggested sequence. A typical capacitor scaling technique optimizes the chip area and power dissipation of the ADC. The proposed ADC is designed and fabricated in s 0.8 um double-poly double-metal n-well CMOS technology. The measured differential and integral nonlinearities of the prototype ADC show less than ${\pm}0.6LSB\;and\;{\pm}2.0LSB$, respectively. The typical ADC power consumption is 119 mW at 3 V with a 40 MHz sampling rate, and 320 mW at 5 V with a 50 MHz sampling rate.

• Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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• v.8 no.6
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• pp.853-861
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• 2018

This paper proposes the application of harmonic constraints to address the problems caused by abnormal voltage increases when electric railway vehicles are running. The AC line that supplies the train with power during operation is used to provide electricity of 25kV/60 Hz, but gradually the size and frequency of harmonics involved in the line are varied with the technological evolution of the railroad vehicle electrical equipment. An increase in heat losses due to the failure of the instrument transformer (PT), the main circuit device, which is a serious problem with the recent train safety operation, or to the main displacement voltage. When high frequency components are introduced through low frequency Transformers of the main circuit device, the high intensity of the components is caused by the high intensity of the core and the current flow of the parasitic core is increased, thus generating heat. To solve this problem, the recent adjustment of the sequence has applied artificial NOTCH OFF of the power converter. However, the method of receiving and controlling the OFF signal operates by interaction between the ground and the vehicle's devices, thus it is invalid in the event of failure, and an actual accident is occurring. Therefore, the harmonic currents were required to prevent possible flow of harmonics, and conducted a study to prevent accidental occurrence of train accidents and to verify feasibility of the device through the simulations of the train's experimental analysis and the simulations of the train for safe operation.

• Journal of Embryo Transfer
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• v.18 no.3
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• pp.171-178
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• 2003

This study was conducted to investigate the effect of electric fusion methods on cell fusion rate and embryo development by somatic cell nuclear transfer in Korean Native Cattle. The KNC ear cell was cultured in vitro for confluence in serum starvation condition(DMEM＋0.05％ FBS) for cell confluence. The zona pellucida of IVM oocytes were partially dissection using micro pipette. Ear cells were transferred into an enucleated oocyte. The reconstructed embryos were electrically fused with Zimmermann Cell Fusion Medium(ZCFM). Nuclear transfer embryos were activated with a combination of 10${\mu}{\textrm}{m}$ calcium ionophore(5 min) and 2.0mM 6-DMAP(3 hr). The activated embryos were cultured in CR1 -aa medium contains 0.3％ BSA or 10％ FBS at 37$^{\circ}C$, 90％ $N_2$, and 5％ $CO_2$in incubator for 6 days. The fusion rates were 51.6％(chamber) and 68.9％(needle), respectively and there were significantly difference between the fusion method(P<0.05). But, lysis rates were not significantly different(10.7％, 11.5％), respectively. The cleavage rates were significantly different between the chamber method(73.2％) and needle method(80.3％), respectively(P<0.05). The rates of early embryos(2∼4cells) and blastocysts of chamber and needle methods were 54.1％, 61.1％ and 18.4％, 26.3％ respectively, and needle method was significantly higher than chamber method(P<0.05). But, morulae formation rate were not significantly differences between the chamber(6.7％) and needle(6.2) method(P <0.05). These result suggest that electric fusion of needle method was to be profitable for nuclear transfer embryo fusion rate, blastocyst formation rate and reduce of oocyte lysis.

• Proceedings of the Korean Vacuum Society Conference
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• 1998.02a
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• pp.166-166
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• 1998

반도체 공정에서 기존보다 큰 30cm 웨이퍼훌 이용하기 위해서 기존의 ECR, Helicon, ICP, 등 공정용 고 밀도 플라즈마 원들의 대면적화에 대한 연구가 세계적으로 진행되고 있다 현 상황에서는 평판형 안테 나룰 이용한 TCP가 대면적용 폴라즈마 원의 가장 유력한 후보로 여겨지고 있다 TCP롤 대면적화 하는 데 있어서 중요한 문제점으로는 대면적에서의 큰 안테나 인되턴스로 인한 임피던스 정합과 대면적에서 의 유전울질의 기계적 강도이다. 앓은 유전물질올 사용힐 수 있도록 대면적 TCP 플라즈마 원올 실계 저l작하였고 이차원 가열이론올 이용한 TCPRP code 률 이용하여 안테나의 반경옳 결정하였디 안테나의 인덕턴스 값올 줄이기 위해서는 주m수는 13.56MHz 보다 낮은 4-5MHz 부근에서 작동하는 RF 파워룰 선택하였다 이 파워 서플라이는 보통 사용되는 50n 흩력 입묘$\mid$던스훌 갖는 형태가 Of니라 LC 공진현상 올 이용하여 부하에 파워률 전달하는 형태이다 .. TCP 장치에 사용할 수 있도록 파워 서플라이 흩력 단에 안테나와 직혈로 가변 콘덴서를 달아서 임11I던스 정합올 힐 수 있게 하였다 안테나에 직훌로 달Of줌으 로써 안테니의 인덕턴스훌 훌여주는 효과훌 얻올 수 있다 안테나에 흐르는 전류룰 측정하기 위해서 사 각형 루프로 전류 픽업 코일을 만들었고 진공상태에서 RF 파워률 인가하고 안테나의 전류와 전압을 측정하여 픽업 코일걸과훌 조정하였다. 발생기체로는 헬륨올 사용하였고 1-100mTorr 의 압력범위에서 실험을 하였다 플라즈마롤 빌샘시키고 파워를 증가 시킴에 따라 E-H mode transition 현상이 관찰되었고 그 때의 임계 전류 값을 측정하였다. 압력이 낮올수록 모드 변화가 일어나는 전류의 값이 작았다 임계 전류는 압력에 대해서 선형적인 특성을 보였다 이는 압력이 낮을수록 유도걸힘이 더 잘 된다는 것을 의미한다 1 1 mTorr에서는 H-mode에서 안테나의 전류가 파워훌 증가시킴에 따라 계속 증가하였으니, 압력이 올라 갈수록 조금씩 증가하는 정도가 줄어들고. 100mTorr에서는 포화된 값을 나타냈다 H-mode로 넘어간 후 에는 파워가 증가황에 따라 안테나의 임피던스 값이 모든 압력영역에서 줄어드는 경황을 보였고, 이는 플라즈마의 인덕턴스에 의해서 안테나의 인덕턴스 기 감소되기 때문이다, 파워가 증가할수록 안테U오} 플라즈마 루프사이의 상호걸합이 증가하는 걸로 해석힐 수 있다 안테나의 인되턴스 변화보다는 저항.성 분의 변화가 컸다 하지만 전체 임피던스로 볼 때 저항성분이 상대적으로 작기 때문에 인덕턴스의 감소 가 더 큰 영향을 미치는 걸로 볼 수 있다. 하지만 플라즈마로의 파워 전달에는 저항성분만이 영향올 미 치므로 저항성분의 큰 변화는 파워가 많이 전달될올 의미한다 피워전달 효율을 계산해 본 결과 수 r mTorr 부근이 80-90% 정도의 높은 효율올 보였고 5mTorr 일 때가 가장 좋았다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.9
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• pp.71-80
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• 2007

This paper presents a new push-push VCO technique that extracts a second harmonic output signal from a capacitive commonnode in a negativegm oscillator topology. The generation of the $2^{nd}$ harmonics is accounted for by the nonlinear current-voltage characteristic of the emitter-base junction diode causing; 1) significant voltage clipping and 2) different rising and falling time during the switching operation of core transistors. Comparative investigations show the technique is more power efficient in the high-frequency region that a conventional push-push technique using an emitter common node. Prototype 12GHz and 17GHz MMIC VCO were realized in GaInP/GaAs HBT technology. They have shown nominal output power of -4.3dBm and -5dBm, phase noise of -108 dBc/Hz and -110.4 dBc/Hz at 1MHz offset, respectively. The phase noise results are also equivalent to a VCO figure-of-merit of -175.8 dBc/Hz and -184.3 dBc/Hz, while dissipate 25.68mW(10.7mA/2.4V) and 13.14mW(4.38mA/3.0V), respectively.