• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.1
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• pp.46-52
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• 2021

This study proposes a feedforward compensation control method to reduce 120 Hz output voltage ripple in a single-phase AC/DC rectifier system composed of PFC and LLC resonant converters. The proposed method compensates for the voltage ripple of the DC-link by using the AC input and DC output power difference, and then reduces the final output voltage ripple component of 120 Hz through feedforward compensation based on the linearized frequency gain curve of the LLC resonant converter. Through simulation and experimental results, the validity of the ripple reduction performance was verified by comparing the conventional PI controller and the proposed feedforward compensation method.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.2
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• pp.106-117
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• 2022

Multiple output converters can be utilized when various output voltages are required in applications. Recently, one of the multiple output converters called fly-buck has been proposed, and has attracted attention due to the advantage that multiple output can be easily obtained with a simple structure. When constant on-time (COT) control is applied, the output ripple voltage must be treated carefully for control stability and voltage regulation characteristics in consideration of the inherent energy transfer characteristics of the fly-buck converter. This study analyzes the operation principle of the fly-buck converter with a ripple generation network and presents the design guideline for the improved output voltage regulation. Validity of the analysis and design guideline is verified using a 5 W prototype of the COT controlled fly-buck converter with a ripple generation network for telecommunication auxiliary power supply.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.6
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• pp.105-112
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• 2003

Diode rectifier which can't be controlled output voltage and phase control converter as AC/DC converter have low power factor and harmonics of lower order in the line current. In this paper, three phase PWM(Pulse Width Modulation) AC/DC boost converter is studied to solve these problems. The characteristics of a proposed converter are to control the phase of current without current sensor as a very simple control algorithm using circuit parameters only and to apply sinusoidal PWM method with fixed switching frequency due to a difficult design of input filter and switching device. We simulate for the proposed algorithm that high power factor is achieved and DC link voltage has fast dynamic response without ripple in rectifying and regenerating operation. As a result of experiment with circuit parameter(inductor, capacitor) decided in simulation, the proposed converter had high power factor and reduction of low order harmonics as against diode rectifier.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.10
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• pp.40-47
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• 2016

In this paper, a dual mode buck converter with an ability to change mode is proposed, which is suitable particularly for portable device. The problem of conventional mode control circuit is affected by load variation condition such as suddenly or slowly. To resolve this problem, the mode control was designed with slow clock method. Also, when change from the PFM(Pulse Frequency Modulation) mode to the PWM(Pulse Width Modulation) mode, to use the counter to detect a high load. And the user can select mode transition point in load range from 20mA to 90mA by 3 bit digital signal. The circuits are implemented by using BCDMOS 0.18um 2-polt 3-metal process. Measurement environment are input voltage 3.7V, output voltage 1.2V and load current range from 10uA to 500mA. And measurement result show that the peak efficiency is 86% and ripple voltage is less 32mV.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.11B
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• pp.1667-1675
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• 2010

This paper presents a high efficiency DC-DC buck converter for mobile device. The circuit employes simplified compensation circuit for its portability and for high efficiency at stand-by mode. This device operates at PFM mode when it enters stand-by mode(light load). In order to place the compensation circuit on chip, the capacitor multiplier method is employed, such that it can minimize the compensation block size of the error amplifier down to 30%. The measurement results show that the buck converter provides a peak efficiency of 93% on PWM mode, and 92.3% on PFM mode. The converter has been fabricated with a $0.35{\mu}m$ CMOS technology. The input voltage of the buck converter ranges from 2.5V to 3.3V and it generates the output of 3.3V.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.6
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• pp.16-24
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• 2009

In this paper, DC-DC buck converter with on-chip filter inductor and capacitor is presented. By operating at high switching frequency of 50MHz with stacked interleaved topology, we reduced inductor and capacitor sizes compared to previously published DC-DC buck converters. The proposed circuit is designed in a standard $0.5{\mu}m$ CMOS process, and chip area is $9mm^2$. This circuit operated at the input voltage of $3{\sim}5V$ range, the maximum load current of 250mA, and the maximum efficiency of 71%.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.6
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• pp.25-32
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• 2011

This paper proposes high efficiency current-mode DC-DC buck converter that are suitable for portable devices. The current-mode DC-DC buck converter using adjustable Dead-time control method improves the power efficiency 2~5%. The buck converter has been implemented with a standard 0.35${\mu}m$ CMOS process. The size of this chip is 0.97$mm^2$. The input range of the fabricated DC-DC buck converter is 2.5V~3.3V, and the output is 1.8V. The maximum loading current of the converter is 500mA and the peak efficiency is 93% at 200mA loads.

• Journal of the Korean Solar Energy Society
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• v.32 no.6
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• pp.106-112
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• 2012

As a fuel cell converts the chemical energy of the fuel cell into electrical energy by electrochemical reaction, the fuel cell system is uniquely integrated technique including fuel processor, fuel cell stack, power conditioning system. The residential fuel cell-PCS(Power Conditioning System) needs to convert efficiently the DC current produced by the fuel cell into AC current using single-phase DC-AC inverter. A single-phase DC-AC inverter has naturally low frequency ripple which is twice frequency of the output current. This low frequency(120Hz) ripple reduces the efficiency of the fuel cell. This paper presents notch filter with IP voltage controller to reject specific 120Hz current ripple in single-phase inverter. The notch filter is designed that suppress just only specific frequency component and no phase delay. Finally, the proposed notch filter design method has been verified with computer simulation and experimentation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.1
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• pp.15-24
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• 2012

In this paper, we suggest the dynamic-response-free SMPS using a new high-resolution DPWM generator based on switched-capacitor delay technique. In the proposed system, duty ratio of DPWM is controlled by voltage slope of an internal capacitor using switched-capacitor delay technique. In the proposed circuit, it is possible to track output voltage by controlling current of the internal capacitor of the DPWM generator through comparison between the feedback voltage and the reference voltage. Therefore the proposed circuit is not restricted by the dynamic-response characteristic which is a problem in the existing SMPS using the closed-loop control method. In addition, it has great advantage that ringing phenomenon due to overshoot/undershoot does not appear on output voltage. The proposed circuit can operate at switching frequencies of 1MHz~10MHz using internal operating frequency of 100 MHz. The maximum current of the core circuit is 2.7 mA and the total current of the entire circuit including output buffer is 15 mA at the switching frequency of 10 MHz. The proposed circuit has DPWM duty ratio resolution of 0.125 %. It can accommodate load current up to 1 A. The maximum ripple of output voltage is 8 mV. To verify operation of the proposed circuit, we carried out simulation with Dongbu Hitek BCD $0.35{\mu}m$ technology parameter.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.148-156
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• 2013

This paper suggests a multi-level and multi-output SMPS based on a shared digital logic controller through independently operating in each dedicated time periods. Although the shared architecture can be devised with small area and high efficiency, it has critical drawbacks that real-time control of each DPWM generators are impossible and its output voltage can be unstable. To solve these problems, a real-time current compensation scheme is proposed as a solution. A current consumption of the core block and entire block with four driver buffers was simulated about 4.9mA and 30mA at 10MHz switching frequency and 100MHz core operating frequency. Output voltage ripple was 11 mV at 3.3V output voltage. Over/undershoot voltage was 10mV/19.6mV at 3.3V output voltage. The noise performance was simulated at 800mA and 100KHz load regulation. Core circuit can be implemented small size in $700{\mu}m{\times}800{\mu}m$ area. For the verification of proposed circuit, the simulations were carried out with Dong-bu Hitek BCD $0.35{\mu}m$ technology.