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Design of the DC-DC Buck Converter for Mobile Application Using PWM/PFM Mode  

Park, Li-Min (인하대학교 전자공학과 아날로그집적회로설계 연구실)
Jung, Hak-Jin (인하대학교 전자공학과 아날로그집적회로설계 연구실)
Yoo, Tai-Kyung (인하대학교 전자공학과 아날로그집적회로설계 연구실)
Yoon, Kwang-Sub (인하대학교 전자공학과)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.35, no.11B, 2010 , pp. 1667-1675 More about this Journal
Abstract
This paper presents a high efficiency DC-DC buck converter for mobile device. The circuit employes simplified compensation circuit for its portability and for high efficiency at stand-by mode. This device operates at PFM mode when it enters stand-by mode(light load). In order to place the compensation circuit on chip, the capacitor multiplier method is employed, such that it can minimize the compensation block size of the error amplifier down to 30%. The measurement results show that the buck converter provides a peak efficiency of 93% on PWM mode, and 92.3% on PFM mode. The converter has been fabricated with a $0.35{\mu}m$ CMOS technology. The input voltage of the buck converter ranges from 2.5V to 3.3V and it generates the output of 3.3V.
Keywords
PWM; PFM; Buck; Soft start; high efficiency;
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