• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.58-63
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• 2013

This paper presents a transceiver design for DisplayPort interface using an optical channel. By converting the electronic channel to the optical channel, the DisplayPort's main channel can provide a high-speed data transmission for long distance. The design converting the electronic channel to the optical channel in the main channel and AUX channel of the DisplayPort is presented in this paper. Futhermore, the HPD signal transmission by using AUX channel is proposed. In order to minimize power consumption, this paper also proposed a method of controlling the TX block in the main link. The proposed system is designed by a FPGA and an optical module. The FPGA used 651 ALUT(adaptive look-up table)s, 511 resisters and 324 block memory bits. The maximum operating rate of the FPGA is 250MHz. With the proposed power control scheme, 740mW of power dissipation reduction can be achieved at the main link optical TX module.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.3
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• pp.184-196
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• 2020

In this paper, a single-bit 2nd-order delta-sigma modulator with the architecture of cascaded-of-integrator feedforward (CIFF) is proposed for precision measurement of current flowing through a secondary cell battery in a battery management system (BMS). The proposed modulator implements two switched capacitor integrators and a single-bit comparator with peripheral circuits such as a non-overlapping clock generator and a bias circuit. The proposed structure is designed to be applied to low-side current sensing method with low common mode input voltage. Using the low-side current measurement method has the advantage of reducing the burden on the circuit design. In addition, the ±30mV input voltage is resolved by the ADC with 15-bit resolution, eliminating the need for an additional programmable gain amplifier (PGA). The proposed a single-bit 2nd-order delta-sigma modulator has been implemented in a 350-nm CMOS process. It achieves 95.46-dB signal-to-noise-and-distortion ratio (SNDR), 96.01-dB spurious-free dynamic range (SFDR), and 15.56-bit effective-number-of-bits (ENOB) with an oversampling ratio (OSR) of 400 for 5-kHz bandwidth. The area and power consumption of the delta-sigma modulator are 670×490 ㎛2 and 414 ㎼, respectively.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.2
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• pp.150-158
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• 2010

The operational characteristics of a resonant DC/DC converter, which can harvest thermoelectric energy, is analyzed, depending on the relative magnitudes of the input voltage and the load voltage. The resonant converter consists of LC resonant circuit connected to DC input source and a resonant pulse converter in which the input energy is transferred to the load as the resonant capacitor voltage is peak. The resonant capacitor doubles the input voltage by the resonance phenomenon. By the relative magnitude between the input voltage and the output voltage, the resonant DC/DC converter operates in three different modes. For boost mode, the peak voltage of the resonant capacitor is smaller than the load voltage. For hybrid mode, the peak voltage of the resonant capacitor is bigger than the load voltage and every switching period has both the boost mode and the direct mode. For the direct mode, the input voltage is bigger than the load voltage and the converter transfers directly the input energy to the load without the switching operation. Operation principles and the feasibility of the converter for the thermoelectric energy harvesting are verified with PSPICE simulation and experiment.

• Smart Media Journal
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• v.9 no.4
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• pp.97-101
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• 2020

Using passive electric field sensor which operates in non-contact mode, we can measure the electric potential induced from the change of electric charges on a sensor caused by the movement of human body or hands. In this study, we propose a new method, which utilizes PLN induced to the sensor around the moving object, to detect one's hand movement and extract gesture frames from the detected signals. Signals from the EPS sensors include a large amount of power line noise usually existing in the places such as rooms or buildings. Using the fact that the PLN is shielded in part by human access to the sensor, signals caused by motion or hand movement are detected. PLN consists mainly of signals with frequency of 60 Hz and its harmonics. In our proposed method, signals only 120 Hz component in frequency domain are chosen selectively and exclusively utilized for detection of hand movement. We use FFT to measure a spectral-separated frequency signal. The signals obtained from sensors in this way are continued to be compared with the threshold preset in advance. Once motion signals are detected passing throng the threshold, we determine the motion frame based on period between the first threshold passing time and the last one. The motion detection rate of our proposed method was about 90% while the correct frame extraction rate was about 85%. The method like our method, which use PLN signal in order to extract useful data about motion movement from non-contact mode EPS sensors, has been rarely reported or published in recent. This research results can be expected to be useful especially in circumstance of having surrounding PLN.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11A
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• pp.883-890
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• 2003

In this paper, Electromagnetic scattering problems by a resistive strip grating with tapered resistivity on a grounded dielectric plane according as strip width and spacing, relative permittivity and thickness of dielectric layers, and incident angles of a electric wave are analyzed by applying the FGMM(Fourier-Galerkin Moment Method) Known as a numerical procedure. The scattered electromagnetic fields are expanded in a series of floguet mode functions. The boundary conditions are applied to obtain the unknown field coefficients and the resistive boundary condition is used for the relationship between the tangential electric field and the electric current density on the strip. The tapered resistivity of resistive strips varies zero resistivity at strip edges. Then the induced surface current density on the resistive strip is expanded in a series of Chebyshev polynomials of the second kind. The numerical results of the geometrically in this paper are compared with those for the existing uniform resistivity and perfectly conducting strip. The numerical results of the normalized reflected power for conductive strips case with zero resistivity in this paper show in good agreement with those of existing paper.

• Journal of Advanced Marine Engineering and Technology
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• v.33 no.8
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• pp.1254-1260
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• 2009

CDMA tele-Controller system is designed with a low power consumption 8 bit microcontroller, ATmega 2560. ATmega 2560 microcontroller consists of 4 UART (Universal asynchronous receiver/transmitter) ports, 4 kbytes EEPROM, 256 kbytes flash memory, 4 kbytes SRAM. 4 URAT is used for CDMA modem, communication for GPS module, EEPROM is used for saving a configuration for program running, a flash memory of 256 kbytes is used for storing a F/W(Firm Ware), and SRAM is used for stack, storing memory of global variables while program running. We have tested the communication distance between the coast station and sea by the fabricated control board using 800 MHz CDMA modem and GPS module, which is building for the navigational aid management system by remote control. As a results, the receiving signal strength is above -80 dBm, and then the characteristics of the control board implemented more than 10 km in the distance of the communication.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.3
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• pp.152-162
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• 2003

In this paper, Binary to Quaternary Converter(BQC), Quaternary to Binary Converter(QBC) and Quaternary inverter circuit, which is the basic logic gate, have been proposed based on voltage mode. The BQC converts the two bit input binary signals to one digit quaternary output signal. The QBC converts the one digit quaternary input signal to two bit binary output signals. And two circuits consist of Down-literal circuit(DLC) and combinational logic block(CLC). In the implementation of quaternary inverter circuit, DLC is used for reference voltage generation and control signal, only switch part is implemented with conventional MOS transistors. The proposed circuits are simulated in 0.35 ${\mu}{\textrm}{m}$ N-well doubly-poly four-metal CMOS technology with a single +3V supply voltage. Simulation results of these circuit show 250MHz sampling rate, 0.6mW power consumption and maintain output voltage level in 0.1V.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.777-780
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• 2005

모바일 오디오 적용을 위한 저전력 ${\Sigma}{\Delta}$ Modulator 에 대한 설계와 layout 을 보였다. 전체 구조는 3 차 단일 피드백 루프이며, 해상도는 16bit 을 갖는다. 샘플링 주파수에 따른 Over-sampling Ratio 는 128(46kHz) 또는 64(96kHz) 가 되도록 하였다. 차동 구조를 사용한 3 차 ${\Sigma}{\Delta}$ modulator 내의 적분기에 사용된 Op-Amp 는 DC-Gain 을 높이기 위해서 Gain-boosting 기법이 적용되었다. ${\Sigma}{\Delta}$ modulator 의 기준 전압은 전류 모드 Band-Gap Reference 회로에서 공급이 되며, PVT(Process, Voltage, Temperature) 변화에 따른 기준 전압의 편차를 보정하기 위하여, binary 3bit 으로 선택하도록 하였다. DAC 에서 사용되는 단위 커패시터의 mismatch 에 의한 성능 감소를 막기 위해, DAC 신호의 경로를 임의적으로 바꿔주는 scrambler 회로를 이용하였다. 4bit Quantizer 내부의 비교기 회로는 고해상도를 갖도록 설계하였고, 16bit thermometer code 에서 4bit binary code 변환시 발생하는 에러를 줄이기 위해 thermometer-to-gray, gray-to-binary 인코딩 방법을 적용하였다. 0.18um CMOS standard logic 공정 내 thick oxide transistor(3.3V supply) 공정을 이용하였다. 입력 전압 범위는 2.2Vp-p,diff. 이며, Typical process, 3.3V supply, 50' C 시뮬레이션 조건에서 2Vpp,diff. 20kHz sine wave 를 입력으로 할 때 SNR 110dB, THD 는 -95dB 이상의 성능을 보였고, 전류 소모는 6.67mA 이다. 또한 전체 layout 크기는 가로 1100um, 세로 840um 이다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.11 no.4
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• pp.29-37
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• 1974

Theoretical analysis is carried out for the curtoff wavelength characteristics of rectangular waveguide containing a step-ridge. In order to obtain the cutoff wavelength of step-rigde waveguide, an transmission matriz is formulated by the method of equivalent transverse resonance. The characteristic equation, in which the wavelength is obtainable by the numerical method, is derived from the equation. An approximate determination of the dominant mode fields in step-ridge waveguides at all frequencies has been made. Using these fields, the characteristic impedance equation is derived from power considerations. Analyzing the results of the calculations, the following characteristics are noted. The values of λ /a of TE10 mode increase with decreasing gap lengths and with increasing step width S or S , or both. Experimental results of cutoff characteristics are in good agreement with the theoretical analusis. It is shown that a waveguide within which a step-ridge is placed has a lower cutoff frequency and impedance than empty guide without it. Therefore, the role of a step-ridge guide is to broadening the bandwidth 2 to 3 times more than that of an empty guide of the same demension.

• Journal of IKEEE
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• v.8 no.2 s.15
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• pp.172-180
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• 2004

In this paper, a parallel Input/Output modulo multiplier, which is applied to AOTP(All One or Two Polynomials) multiplicative algorithm over $GF(3^m)$, has been proposed using neuron-MOS Down-literal circuit on voltage mode. The three-valued input of the proposed multiplier is modulated by using neuron-MOS Down-literal circuit and the multiplication and Addition gates are implemented by the selecting of the three-valued input signals transformed by the module. The proposed circuits are simulated with the electrical parameter of a standard $0.35{\mu}m$CMOS N-well doubly-poly four-metal technology and a single +3V supply voltage. In the simulation result, the multiplier shows 4 uW power consumption and 3 MHzsampling rate and maintains output voltage level in ${\pm}0.1V$.