• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.8 s.338
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• pp.1-6
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• 2005

A dual-level low voltage differential signalling (DLVDS) circuit is proposed aiming at reducing transmission lines for LCD driver IC. In the proposed circuit, we apply a couple of primitive data to DLVDS circuit as inputs. The transmitter converts two inputs to two kinds of fully differential level signals. In this circuit, two transmission lines are sufficient to transfer two primitive inputs while keeping the LVDS feature. The receiver recovers The original input data through a level decoding circuit. We fabricated the proposed circuit using $0.25\mu m$ CMOS technology. The resultant circuit shows 1-Gbps/2-line data rate and 35-mW power consumption at 2.5V supply voltage, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.7C
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• pp.652-657
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• 2007

Optical subcarrier-multiplexed (OSCM) labels in optical label switching networks have been detected using interleavers composed of fiber-optic Mach-Zehnder interferometer. 10-GHz optical single-/double-sideband signals generated from dual-electrode Mach-Zehnder intensity modulator have been used as the OSCM labels. In the case of single-sideband signals, the upper-sideband was observed to be suppressed about 16.8 dB compared with the lower-sideband from the optical spectrum measured at the label extraction output. For the case of double-sideband signals, both sidebands appeared with small insertion loss at the interleaver output. Since we used the phase-shift method to generate single-sideband signals, the power level of the single-sideband was higher by 3 dB than that of the double-sidebands.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.28-35
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• 2007

In this paper, an ultra low voltage SRAM design method based on dual-boosted cell bias technique is described. For each read/write cycle, the wordline and cell power node of the selected SRAM cells are boosted into two different voltage levels. This enhances SNM(Static Noise Margin) to a sufficient amount without an increase of the cell size, even at sub 1-V supply voltage. It also improves the SRAM circuit speed owing to increase of the cell read-out current. The proposed design technique has been demonstrated through 0.8-V, 32K-byte SRAM macro design in a $0.18-{\mu}m$ CMOS technology. Compared to the conventional cell bias technique, the simulation confirms an 135 % enhancement of the cell SNM and a 31 % faster speed at 0.8-V supply voltage. This prototype chip shows an access time of 23 ns and a power dissipation of $125\;{\mu}W/Hz$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.7
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• pp.675-678
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• 2015

In this paper, we proposed a multi-function conversion block for microwave receiver. The proposed multi-function conversion block is composed of a broadband voltage controlled oscillator and a dual-mode mixer. Depending on whether the bias voltage is supplied, the first IF(Intermediate Frequency) output frequency(4,595 MHz/6,045 MHz) needed in microwave receiver is converted to 720 MHz and the another IF output frequency(720 MHz) for receiving Ku-band has the multi-functional operations of the dual mode that are bypass and attenuation without frequency conversion. Implementation and measurement results show that each intermediate frequency has conversion loss characteristic according to the LO power. The LO power conversion loss of 4,595 MHz at the LO levels from 2 dBm to 4 dBm is 13 dB, another of 6,035 MHz is 12 dB and the other of 720 MHz is 7.0 dB.

• Korean Journal of Optics and Photonics
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• v.33 no.3
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• pp.106-112
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• 2022

A two-dimensional optical code division multiple access (OCDMA) encoder/decoder, which is composed of add/drop filters and all-pass filters for delay operation, is proposed. An example design is presented, and its feasibility is illustrated through numerical simulations. The chip area of the proposed OCDMA encoder/decoder could be about one-third that of a previous OCDMA device employing delay waveguides. Its performance is numerically investigated using the transfer-matrix method combined with the fast Fourier transform. The autocorrelation peak level over the maximum cross-correlation level for incorrect wavelength hopping and spectral phase code combinations is greater than 3 at the center of the correctly decoded pulse, which assures a bit error rate lower than 10^-3, corresponding to the forward error-correction limit.

• Journal of IKEEE
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• v.28 no.2
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• pp.234-238
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• 2024

This paper presents a study on the integration of 3D-stacked dual-tip RRAM with a CNN accelerator architecture, leveraging its low drive current characteristics and scalability in a 3D stacked configuration. The dual-tip structure is utilized in a parallel connection format in a synaptic array to implement multi-level capabilities. It is configured within a Network-on-chip style accelerator along with various hardware blocks such as DAC, ADC, buffers, registers, and shift & add circuits, and simulations were performed for the CNN accelerator. The quantization of synaptic weights and activation functions was assumed to be 16-bit. Simulation results of CNN operations through a parallel pipeline for this accelerator architecture achieved an operational efficiency of approximately 370 GOPs/W, with accuracy degradation due to quantization kept within 3%.

• Journal of Korean Society of Transportation
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• v.22 no.5
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• pp.139-149
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• 2004

As the expansion of road capacity has become impractical in many urban areas, congestion pricing has been widely considered as an effective method to reduce urban traffic congestion in recent years. The principal reason is that the congestion pricing may lead the user equilibrium (UE) flow pattern to system optimum (SO) pattern in road network. In the context of network equilibrium, the link tolls according to the marginal cost pricing principle can user an UE flow to a SO pattern. Thus, the pricing method offers an efficient tool for moving toward system optimal traffic conditions on the network. This paper proposes a continuous network design program (CNDP) in network equilibrium condition, in order to find optimal congestion toll for maximizing net economic benefit (NEB). The model could be formulated as a bi-level program with continuous variable(congestion toll) such that the upper level problem is for maximizing the NEB in elastic demand, while the lower level is for describing route choice of road users. The bi-level CNDP is intrinsically nonlinear, non-convex, and hence it might be difficult to solve. So, we suggest a heuristic solution algorithm, which adopt derivative information of link flow with respect to design parameter, or congestion toll. Two example networks are used for test of the model proposed in the paper.

• Journal of KIISE:Information Networking
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• v.29 no.3
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• pp.253-264
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• 2002

Recently, hierarchical architectures of databases for location management have been proposed in order to accommodate the increase in user population in future personal communication systems. In particular, a 3-level hierarchical database architecture is compatible with current cellular mobile systems. In the architecture, a newly developed additional databases, regional location database(RLR), are positioned between HLR and VLRs. We propose an efficient cache scheme, called the Double T-thresholds Location Cache Scheme. The cache scheme extends the existing T-threshold location cache scheme which is competent only under 2-level architecture of location databases currently adopted by IS-41 and GSM. The idea behind our scheme is to use two pieces of cache information, VLR and RLR serving called portables. The two pieces are required in order to exploit root only locality of registration area(RA) but also locality of regional registration area(RRA) which is the wide area covered by RLR. We also use two threshold values in order to determine whether the two pieces are obsolete. In order to model the RRA residence time, the branching Eralng-$\infty$ distribution is introduced. Our minute cost analysis shows that the double T-threshold location cache scheme yields significant reduction of network and database costs for molt patterns of portables.

• Investigative Magnetic Resonance Imaging
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• v.18 no.1
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• pp.34-42
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• 2014

Purpose : To evaluate the correlation of lesion-to-normal ratio (LNR) of signal intensity from double inversion recovery MR imaging and total choline-containing compound (tCho) resonance from single voxel MR spectroscopy in breast cancers. Materials and Methods: Between August 2008 and December 2009, 28 patients who were diagnosed as breast cancer and had undergone both double inversion recovery (DIR) MR imaging and MR spectroscopy (MRS) were included in this study. The signal intensities of the lesion (L) and ipsilateral normal breast tissue (N) were measured in region of interest of each breast cancer in DIR and contrast enhance MR image (CE-T1WI) to calculate the LNR value for each technique. MRS was performed using single-voxel MR spectroscopy. The height, width and area of tCho resonance were compared with each LNR of DIR and CE-T1WI. We used Pearson's correlation coefficient(r) for correlation analysis and the significance level was p=0.05. Results: There was no statistically significant correlation between LNR of CE-T1WI and height (r=-0.322, p=0.094), width (r=-0.233, p=0.232) and area (r=-0.309, p=0.109) of MRS tCho. There was no statistically significant correlation between LNR of DIR and height (r=0.067, p=0.735), width (r=-0.287, p=0.139) and area (r=0.012, p=0.953) of MRS tCho, either. The Pearson's correlation coefficient was 0.186 between LNRs of CET1WI and DIR (p=0.344). Conclusion: There was no statistically significant correlation between LNR of DIR and relative amount of tCho resonance of MRS.

• Proceedings of the Acoustical Society of Korea Conference
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• autumn
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• pp.53-56
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• 1999

ITU-T 국제 표준화 기구에서 인터넷 폰과 화상회의를 목적으로 개발된 G.723.1 음성 부호화기는 잡음 구간에서의 전송률을 낮추기 위한 방법으로 VAD(Voice Activity Detector)와 CNG(Comfort Noise Generator)를 사용하고 있다 이중 VAD는 최종적으로 현재 프레임의 에너지 레벨을 비교하여 음성의 활동 유무를 판정하고 있다. 하지만 G.723.1 VAD에서는 보다 안정적인 판정을 위해 음성 활동 구간 사이에 삽입되어 있는 묵음 구간에 대해서는 거의 대부분 음성이 활동하는 영역으로 판정을 하고 있다. 따라서 본 논문에서는 묵음 구간에 대해 보다 정확한 판정을 통하여 기존의 방법에 비해 전송율을 더욱 감소시킬 수 있는 방법을 제안한다. 실험에서는 묵음구간을 길게 조절한 문장을 사용하여 측정한 결과 평균 $46.8\%$ 정도의 전송율을 감소시킬 수 있었으며, 주관적인 음질평가의 경우 음질의 열하는 거의 발생하지 않았다.