• Title/Summary/Keyword: 위상 평균

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Design of a 10 GHz Phased-Array Antenna Using CFG True Time-Delays (CFG 실 시간지연 선로를 사용한 10 GHz 위상 배열 안테나의 설계)

  • 이갑용;최연봉;신종덕;김부균;이상배
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.3C
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    • pp.241-247
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    • 2002
  • In this paper, we proposed a continuously variable true time-delay for transmit linear phased-array antenna sing chirped fiber gratings(CFGs) and a tunable laser source. Average group delay-slope of the CFG was treasured to be 177 ps/nm at L-, S-, and X-band. Simulation results show that the maximum gain of the transmit linear phased-array antenna with the beam steering angle of 180$^{\circ}$ is 11.6 dB at 10 GHz.

Self-starting phase conjugate laser in population inverted Nd:YAG (밀도 반전된 Nd:YAG에서의 자체 발진 위상공액 레이저)

  • ;M.J.Damzen
    • Korean Journal of Optics and Photonics
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    • v.8 no.5
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    • pp.357-361
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    • 1997
  • We report the operation of a self-starting phase conjugate laser(PCL) oscillator which compensates intracavity phase distortion. The self-starting PCL in the population inverted Nd:YAG gain media produced an output energy of 200 mJ in a 20 ns single-longitudinal-mode pulse at 10Hz. And it showed well-defined Gaussian spatial profile.

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A Study on measurement blood velocity according to variable changing in magnetic resonance phase contrast image (자기공명 위상대조도 기법에서 병렬영상기법 변화에 따른 혈류정량 측정에 관한 연구)

  • Cho, yong-bum;Yang, seon-wook;Son, soon-yong
    • Proceedings of the Korea Contents Association Conference
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    • 2017.05a
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    • pp.107-108
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    • 2017
  • 3차원 위상대조도 기법의 단점인 긴 검사시간으로 인해 임상적 유용성이 떨어진다. 본 논문은 시간매개변수인 병렬영상기법(Grappa) 변경에 따른 혈류정보의 정량적 평가를 통해 차이점을 알아보고 임상적 활용정도를 평가하였다. 자체 제작한 혈류팬텀을 통해 실험하였으며, Grappa을 5번 변경하여 실험하였다. 연구결과, Grappa를 적용하지 않았을 경우 혈류속도는 평균 9.42로 총 4단계를 적용한 혈류속도 차이율은 각각(1.4, 1.5, 0.4, 1.5%)이었으며 flow와 WSS도 각각(1.4, 1.6, 0.8, 25%), (2.1, 1.4, 1.1, 0.8%)이었다. 통계적으로도 유의하지 않아 Grappa를 적용하지 않은 검사법과 혈류정보가 동일하였다.(P>0.05) 긴 검사 시간으로 인해 임상적 활용이 떨어지는 짧은 검사시간을 요하는 소아환자나 중등도 환자 또는 폐쇄공포증 환자에게 시간을 단축한 3차원 위상대조도 기법을 사용하여 단점을 보완한다면 임상적 활용가치가 높아질 것이라 사료된다.

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Lightweight Design for Front Knuckle of Solar-Powered Vehicle using Topology Optimization (위상최적화를 이용한 태양광 자동차 프론트 너클의 경량화 설계)

  • Jeong, DaeYoung;Lee, JunYoung;Kim, MoonYoung;Yim, HongJae
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2014.10a
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    • pp.594-597
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    • 2014
  • 본 논문에서는 국제 태양광 자동차 대회를 참가하는 태양광 자동차 프론트 너클의 경량화 설계에 관한 연구를 진행한다. 이를 위해 Cattle grid 를 포함한 실제 주행환경과 태양광 자동차를 동역학 시뮬레이션 모델로 구성하고 대회에서 차량의 평균속도인 70Km/h 로 주행 시, 서스펜션에서 발생되는 동하중을 측정하였다. 프론트 너클을 유한요소로 구성하고 다물체 동역학 시뮬레이션에서 도출된 하중들로 위상최적기법을 통해 프론트 너클의 경량화를 이루었다. 마지막으로 피로해석을 수행하여 그 타당성을 검증하였다.

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Phase Control of ZVT Interleaved Bi-directional LDC for Reducing Conduction Losses in Zero-Current Mode (영전류 모드 도통손실 저감을 위한 ZVT Interleaved Bi-directional LDC의 위상 제어)

  • Jung, Won-Sang;Lee, Soon-Ryung;Lee, Jong-Young;Park, Yun-Ji;Won, Chung-Yuen
    • Proceedings of the KIPE Conference
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    • 2017.07a
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    • pp.367-368
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    • 2017
  • 본 논문에서는 영전류 모드로 진입한 zero voltage transition(ZVT) interleaved bi-direction low voltage DC-DC converter(IB-LDC)의 도통 손실을 최소화하기 위한 위상 제어가 제안된다. IB-LDC의 출력단 배터리가 완충되어 영전류 모드로 진입하면 IB-LDC의 입 출력 평균 전류는 0[A]로 감소하지만 보조 회로 전류는 기존의 설계 값에 의해 감소하지 않아 지속적인 도통 손실을 일으킨다. 따라서 본 논문에서는 영전류 모드로 진입한 IB-LDC의 보조 회로에 ZVT 조건을 만족시키는 공진 전류만 흐르도록 하여 도통 손실을 최소화하는 위상 제어를 제안하였다. 또한 PSIM simulation 및 실험을 통해 증명하였다.

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Implementation of Phase-Shifted Full-Bridge dc-dc Converter Applying a Synchronous Rectification by using GaN HEMT. (GaN HEMT를 적용한 동기 정류 위상천이 dc-dc Converter 구현)

  • Yoo, Jae-Gon;Kim, Hyun-Bin;Joo, Dong-Myoung;Lee, Byung-kuk;Kim, Jong-Soo
    • Proceedings of the KIPE Conference
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    • 2016.11a
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    • pp.127-128
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    • 2016
  • 본 논문에서는 2차 측 정류 회로에 GaN HEMT 소자를 이용하는 동기정류기법을 적용한 위상천이 dc-dc 컨버터를 구현한다. 기존 다이오드를 통한 정류회로와의 효율 비교를 통하여 GaN HEMT 동기정류 기반 위상천이 dc-dc 컨버터가 최고효율 1.5%, 평균 효율 0.85%, 전부하 효율 1.99%의 향상효과를 확인한다.

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A Study on the Performance of a Modified Binary Quantized first-Order DPLL (2단 양자화기를 사용한 1차 DPLL의 성능 개선에 관한 연구)

  • 강치우;김진헌
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.3
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    • pp.6-12
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    • 1984
  • The basic binary quantized first-order digital phase locked loop (DPLL) is modified in order to reduce the aquisition time and steadyftate phase error. Adding the loop that corrects the phase difference by detecting the falling zero-crossing time, an effort for the improving the performance is performed and the performance compared with that of the basic DPLL. Using a graphical method, the phase locking processes of the modified DPLL for a phase step and a frequency step input are depicted visually in the absence of noise. The performance of the modified DPLL for a sinusoidal input added narrow band random noise is evaluated using the Chapman-Kolmogorov equation. This approach is verified by direct computer simulation. The steady-state phase error and the average aquisition time of the modified DPLL are compared with those of the basic DPLL, It is shown that the aquisition time of the modified DPLL is shortened about twice, also, as signal to noise ratio increases, the effect of the modification increases and the steady-state phase error approaches to zero.

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A 60GHz Active Phase Shifter with 65nm CMOS Switching-Amplifiers (65nm CMOS 스위칭-증폭기를 이용한 60GHz 능동위상변화기 설계)

  • Choi, Seung-Ho;Lee, Kook-Joo;Choi, Jung-Han;Kim, Moon-Il
    • Journal of IKEEE
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    • v.14 no.3
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    • pp.232-235
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    • 2010
  • A 60GHz active phase shifter with 65nm CMOS is presented by replacing passive switches in switched-line type phase shifter with active ones. Active-switch phase shifter is composed of active-switch blocks and passive delay network blocks. The active-switch phase shifter design is compact compare with the conventional vector-sum phase shifter. Active-switch blocks are designed to accomplish required input and output impedances whose requirements are different whether the switch is on or off. And passive delay network blocks are composed of lumped L,C instead of normal microstrip line to reduce the size of the circuit. An 1-bit phase shifter is fabricated by TSMC 65nm CMOS technology and measurement results present -4dB average insertion loss and 120 degree phase shift at 65GHz.

Azimuth Accuracy of Correlative Interferometer Direction Finder on Airborne Scale-down Model (항공기 축소모델의 상관형 위상비교 방향탐지장치의 방위각 정확도)

  • Lim, Joong-Soo
    • Journal of the Korea Convergence Society
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    • v.9 no.10
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    • pp.1-6
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    • 2018
  • This paper describes the azimuth accuracy of correlative interferometer direction finder on a scaled down airplane model. When the antennas are placed on the bottom of an airplane, reflection signals caused by an aircraft structure are arise and caused an azimuth error. In this paper, the F-16 fighter scale-down model was made to 5:1, and five antennas were placed on the bottom of the model. The accuracy was made by numerically analyzing the phases of the radio waves received by the five antennas when the signal of emitter was transmitted on $0-360^{\circ}$ azimuth angles. The azimuth error of the correlative interferometer direction finder on the model was measured to be less than $1.0^{\circ}$ when SNR was larger then 3dB, and it could be very useful for the design of the direction finder on airplane.

Synchronization Scheme Using Phase Offsets of PN Sequences (PN 부호의 위상오프셋을 이용한 동기 방법)

  • Song, Young-Joon;Han, Young-Yearl
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2003.11a
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    • pp.581-584
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    • 2003
  • It is important to know phase offsets of PN (Pseudo Noise) sequences in spread spectrum communications since the acquisition is equivalent to make a phase offset between a receiving PN sequence and a PN sequence of local PN generator be identical. In this paper, a phase offset enumeration method for PN sequences with error detection, and its application to the synchronization are proposed. The phase offset enumeration far an n-tuple PN sequence and its error detection are performed when one period of the sequence is received. Once the phase offset of the receiving sequence is calculated, we can easily accomplish the synchronization by initializing shift registers of a local PN generator according to the phase offset value. The mean acquisition time of the proposed synchronization method is derived analytically, and we see that the method acquires very fast acquisition in the high SNR (Signal-to- Noise Ratio) environment.

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