• Journal of the Korea Society of Computer and Information
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• v.7 no.3
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• pp.36-41
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• 2002

This study was carried out develope a ultrasonic transducer displacement generator through 26KHz and 38KHz of the frequency phase modulation on the ultrasonic transducer. This system was producted a power output generation such as 100W, 300W, 400W and 600W. Ultrasonic power output had a change of time. We made use of a Thiram hydration and detected it measurement by the ACAO method. It was to decide the result of ultrasonic power supply for time duration and the result of comparison in the 26KHz & 38KHz by UV/VIS spectrophotometer.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.6
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• pp.627-634
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• 2010

In this paper, a novel voltage-controlled oscillator(VCO) using the complimentary bifilar archimedean spiral resonator(CBASR) is presented for reducing the phase noise characteristic. A CBASR has compact dimension, a sharp skirt characteristic in stopband, a low insertion loss in passband, and a large coupling coefficient value, which makes a high Q value and improve the phase noise of VCO. The proposed VCO has the oscillation frequency of 2.396~2.502 GHz in the tuning voltage of 0~5 V, the output power of 7.5 dBm and phase noise of -119.16~-120.2 dBc/㎐ at the offset frequency of 100 kHz in tuning range.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.1
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• pp.90-96
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• 2014

This paper presents a practical linearization technique for a wide-band bang-bang digital phase locked-loop(BBDPLL) by selecting optimal loop gains. In this paper, limitation of the theoretical design method for BBDPLL is explained, and introduced how to implement practical BBDPLLs with CMOS process. In the proposed BBDPLL, the limited cycle noise is removed by reducing the proportional gain while increasing the integer array and dither gain. Comparing to the conventional BBDPLL, the proposed one shows a small area, low power, linear characteristic. Moreover, the proposed design technique can control a loop bandwidth of the BBDPLL. Performance of the proposed BBDPLL is verified using CppSim simulator.

• Korean Journal of Optics and Photonics
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• v.15 no.6
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• pp.547-554
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• 2004

We investigated a LiNbO$_3$ based integrated-optic polarization controller with the Ti-indiffused waveguide along the z-axis utilizing the electro-optic effect. The device consists of a first quarter-wave (λ / 4) followed by a half-wave (λ / 2) and a second quarter-wave (λ / 4) wave-plate. We analyzed the amount of phase change and the transformation of the polarized mode as a function of the combination of wave-plates and of their applied voltages. The operation has been systematically measured utilizing a polarimeter and Poincare sphere. We confirmed that the fabricated device controls the transformations from any arbitrary input state of polarization (SOP) into any general output SOP.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.11 s.114
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• pp.1112-1119
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• 2006

In this paper, mutually coupled oscillator is employed to improve phase noise. Mutually coupled structure oscillator couples two oscillator's phase shifted output signals, that is fabricated using teflon board which has dielectric constant of 2.5 and Surface Mount Gallium Arsenide FET devices. And this paper proposed the structure to bias adjustment for the phase condition of mutually couples. When one oscillator has bias point of 4.4 V and 37 mA, it's output signal has phase noise characteristic of -96.37 dBc(@9305 MHz, offset frequency 100 KHz), -73.46 dBc(10 kHz). and After it's output signal mutually coupled the other's output signal that has bias point of 8.1 V and 69 mA, it has superior phase noise characteristic of -106.7 dBc(@9305 MHz, offset frequency 100 kHz), -81 dBc(10 kHz).

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.111-113
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• 2007

본 논문에서는 FPGA를 사용하여 진행파형 초음파 모 터의 2상 입력 전원 전압의 주파수, 위상차, 진폭 및 2 상간의 전압차 조절이 가능하고, 8대의 초음파 모터를 동 시에 제어할 수 있는 8채널 USB통신 PC기반 초음파 모터 디지털 제어기를 제안한다. 제안한 제어기는 FPGA를 이용 한 디지털 논리에 의해 출력을 발생하기 때문에 PC로부 터 직접 제어 명령을 입력 받아 각각의 파라미터를 실시 간으로 조절할 수 있을 뿐만 아니라, 둘 이상의 파라미터 를 동시에 조절이 가능하다. 또한, PC와의 인터페이스는 USB통신 방식을 채택하여 제어 명령의 전달속도 향상 및 플러그 앤 플러그 방식을 통해 데스크 탑 컴퓨터는 물론 휴대용 컴퓨터나 PDA와 같은 다양한 플랫폼에서 사용할 수 있도록 설계하였다. 또한, 초음파 모터의 속도 및 위치를 계측하기 위해 사용된 로터리 엔코더 카운터 회로를 FPGA회로에 내장시켜 카운터를 위한 별도의 회로 구성이나 장비 구입의 필요성을 배제하였다. 따라서, 생산 단가 및 부피를 현저히 감소시켰다.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.83-89
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• 2014

A ku-band complementary cross-coupled differential voltage controlled oscillator is designed, measured and fabricated using $0.18-{\mu}m$ CMOS technology. A 2.4GHz of very wide frequency tuning at oscillating frequency of 14.5GHz is achieved with presented circuit topology and MOS varactors. Measurement results show -1.66dBm output power with 18mA DC current drive from 3.3V power supply. When 5V is applied, the output power is increased to 0.84dBm with 47mA DC current. -74.5dBc/Hz phase noise at 100kHz offset is measured. The die area is $1.02mm{\times}0.66mm$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.2
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• pp.99-108
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• 2018

This paper presents a design study of a solid state power oscillator to replace the conventional magnetron. The operational conditions of a single-stage 300 W LDMOS power amplifier were fully characterized. The power module consisted of two amplifiers connected in parallel. A delay-line feedback loop was designed for self-oscillation. A phase shifter was inserted in the delay-line feedback loop for adjusting the round-trip phase. Experiments performed using the power oscillator showed an output power of 800 W and a DC-RF conversion efficiency of 58 % at 2.327 GHz. The measured results were in good agreement with those predicted by numerical simulations.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.4
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• pp.576-585
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• 2001

In this paper, we investigated the method of compensation for optical pulse shape distortion due to both chromatic dispersion and SPM(self phase modulation) in a single mode fiber We selected MSSI(mid-span spectral inversion) as compensation method using OPC(optical phase conjugator). We used EOP(eye-opening penalty) parameter in order to evaluate the efficiency of waveform distortion compensation. In this paper, we induced optimum pump power level in optical phase conjugator through analytic method of computer simulation. And we investigated input signal power range being able to maintain stable reception performance under the condition of optimum pump power. We verified the possibility of high performance optical transmission system realization through the inducement and application of optimum pump power, input signal power and in-line amplifier spacing, because power control is important in the compensation for optical pulse distortion.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.21-31
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• 2010

This paper presents a design of PLL and SSCG for reducing the EMI effect at the electronic machinery and tools for DisplayPort application. This system is composed of the essential element of PLL and Charge-Pump2 and Reference Clock Divider to implement the SSCG operation. In this paper, 270MHz/162MHz dual-mode PLL that can provide 10-phase and 1.35GHz/810MHz PLL that can reduce the jitter are designed for 2.7Gbps/162Gbps DisplayPort application. The jitter can be reduced drastically by combining 270MHz/162MHz PLL with 2-stage 5 to 1 serializer and 1.35GHz PLL with 2 to 1 serializer. This paper propose the frequency divider topology which can share the divider between modes and guarantee the 50% duty ratio. And, the output current mismatch can be reduced by using the proposed charge-pump topology. It is implemented using 0.13 um CMOS process and die areas of 270MHz/162MHz PLL and 1.35GHz/810MHz PLL are $650um\;{\times}\;500um$ and $600um\;{\times}\;500um$, respectively. The VCO tuning range of 270 MHz/162 MHz PLL is 330 MHz and the phase noise is -114 dBc/Hz at 1 MHz offset. The measured SSCG down spread amplitude is 0.5% and modulation frequency is 31kHz. The total power consumption is 48mW.