• Title/Summary/Keyword: 연산지연

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Extracting optimal moving patterns of edge devices for efficient resource placement in an FEC environment (FEC 환경에서 효율적 자원 배치를 위한 엣지 디바이스의 최적 이동패턴 추출)

  • Lee, YonSik;Nam, KwangWoo;Jang, MinSeok
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.1
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    • pp.162-169
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    • 2022
  • In a dynamically changing time-varying network environment, the optimal moving pattern of edge devices can be applied to distributing computing resources to edge cloud servers or deploying new edge servers in the FEC(Fog/Edge Computing) environment. In addition, this can be used to build an environment capable of efficient computation offloading to alleviate latency problems, which are disadvantages of cloud computing. This paper proposes an algorithm to extract the optimal moving pattern by analyzing the moving path of multiple edge devices requiring application services in an arbitrary spatio-temporal environment based on frequency. A comparative experiment with A* and Dijkstra algorithms shows that the proposed algorithm uses a relatively fast execution time and less memory, and extracts a more accurate optimal path. Furthermore, it was deduced from the comparison result with the A* algorithm that applying weights (preference, congestion, etc.) simultaneously with frequency can increase path extraction accuracy.

Efficient Self-supervised Learning Techniques for Lightweight Depth Completion (경량 깊이완성기술을 위한 효율적인 자기지도학습 기법 연구)

  • Park, Jae-Hyuck;Min, Kyoung-Wook;Choi, Jeong Dan
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.20 no.6
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    • pp.313-330
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    • 2021
  • In an autonomous driving system equipped with a camera and lidar, depth completion techniques enable dense depth estimation. In particular, using self-supervised learning it is possible to train the depth completion network even without ground truth. In actual autonomous driving, such depth completion should have very short latency as it is the input of other algorithms. So, rather than complicate the network structure to increase the accuracy like previous studies, this paper focuses on network latency. We design a U-Net type network with RegNet encoders optimized for GPU computation. Instead, this paper presents several techniques that can increase accuracy during the process of self-supervised learning. The proposed techniques increase the robustness to unreliable lidar inputs. Also, they improve the depth quality for edge and sky regions based on the semantic information extracted in advance. Our experiments confirm that our model is very lightweight (2.42 ms at 1280x480) but resistant to noise and has qualities close to the latest studies.

A Study on Integrity Protection of Edge Computing Application Based on Container Technology (컨테이너 기술을 활용한 엣지 컴퓨팅 환경 어플리케이션 무결성 보호에 대한 연구)

  • Lee, Changhoon;Shin, Youngjoo
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.31 no.6
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    • pp.1205-1214
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    • 2021
  • Edge Computing is used as a solution to the cost problem and transmission delay problem caused by network bandwidth consumption that occurs when IoT/CPS devices are integrated into the cloud by performing artificial intelligence (AI) in an environment close to the data source. Since edge computing runs on devices that provide high-performance computation and network connectivity located in the real world, it is necessary to consider application integrity so that it is not exploited by cyber terrorism that can cause human and material damage. In this paper, we propose a technique to protect the integrity of edge computing applications implemented in a script language that is vulnerable to tampering, such as Python, which is used for implementing artificial intelligence, as container images and then digitally signed. The proposed method is based on the integrity protection technology (Docker Contents Trust) provided by the open source container technology. The Docker Client was modified and used to utilize the whitelist for container signature information so that only containers allowed on edge computing devices can be operated.

Efficient Semi-systolic Montgomery multiplier over GF(2m)

  • Keewon, Kim
    • Journal of the Korea Society of Computer and Information
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    • v.28 no.2
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    • pp.69-75
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    • 2023
  • Finite field arithmetic operations play an important role in a variety of applications, including modern cryptography and error correction codes. In this paper, we propose an efficient multiplication algorithm over finite fields using the Montgomery multiplication algorithm. Existing multipliers can be implemented using AND and XOR gates, but in order to reduce time and space complexity, we propose an algorithm using NAND and NOR gates. Also, based on the proposed algorithm, an efficient semi-systolic finite field multiplier with low space and low latency is proposed. The proposed multiplier has a lower area-time complexity than the existing multipliers. Compared to existing structures, the proposed multiplier over finite fields reduces space-time complexity by about 71%, 66%, and 33% compared to the multipliers of Chiou et al., Huang et al., and Kim-Jeon. As a result, our multiplier is proper for VLSI and can be successfully implemented as an essential module for various applications.

Key-Agreement Protocol between IoT and Edge Devices for Edge Computing Environments (에지 컴퓨팅 환경을 위한 IoT와 에지 장치 간 키 동의 프로토콜)

  • Choi, Jeong-Hee
    • Journal of Convergence for Information Technology
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    • v.12 no.2
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    • pp.23-29
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    • 2022
  • Recently, due to the increase in the use of Internet of Things (IoT) devices, the amount of data transmitted and processed to cloud computing servers has increased rapidly. As a result, network problems (delay, server overload and security threats) are emerging. In particular, edge computing with lower computational capabilities than cloud computing requires a lightweight authentication algorithm that can easily authenticate numerous IoT devices.In this paper, we proposed a key-agreement protocol of a lightweight algorithm that guarantees anonymity and forward and backward secrecy between IoT and edge devices. and the proposed algorithm is stable in MITM and replay attacks for edge device and IoT. As a result of comparing and analyzing the proposed key-agreement protocol with previous studies, it was shown that a lightweight protocol that can be efficiently used in IoT and edge devices.

Memory Allocation and Reclamation Policies for Fast Swap Support in Mobile Systems (모바일 시스템의 고속 스왑 지원을 위한 메모리 할당 및 회수 기법)

  • Hyokyung Bahn
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.24 no.4
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    • pp.29-33
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    • 2024
  • Recent advancements in mobile apps have led to continuously increasing memory demands on smartphone systems. Unlike desktops, which use swap functions to backup the entire memory footprint to storage when memory space is exhausted, smartphones terminate apps and lose significant context. This occurs because large-scale I/O operations to flash memory cause severe delays when swap is enabled on smartphones. This paper discusses how efficient memory management can be performed by using eMRAM, which is faster in write operations than flash memory, as the swap area in mobile systems. Considering the characteristics of backup storage (i.e., flash memory for the file system and eMRAM for the swap areas) as well as the reference characteristics of each page, we demonstrate that the proposed memory allocation and reclamation policies can improve the smartphone's I/O performance by an average of 15%.

Revision of ART with Iterative Partitioning for Performance Improvement (입력 도메인 반복 분할 기법 성능 향상을 위한 고려 사항 분석)

  • Shin, Seung-Hun;Park, Seung-Kyu;Jung, Ki-Hyun
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.46 no.3
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    • pp.64-76
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    • 2009
  • Adaptive Random Testing through Iterative Partitioning(IP-ART) is one of Adaptive Random Testing(ART) techniques. IP-ART uses an iterative partitioning method for input domain to improve the performances of early-versions of ART that have significant drawbacks in computation time. Another version of IP-ART, named with EIP-ART(IP-ART with Enlarged Input Domain), uses virtually enlarged input domain to remove the unevenly distributed parts near the boundary of the domain. EIP-ART could mitigate non-uniform test case distribution of IP-ART and achieve relatively high performances in a variety of input domain environments. The EIP-ART algorithm, however, have the drawback of higher computation time to generate test cases mainly due to the additional workload from enlarged input domain. For this reason, a revised version of IP-ART without input domain enlargement needs to improve the distribution of test cases to remove the additional time cost. We explore three smoothing algorithms which influence the distribution of test cases, and analyze to check if any performance improvements take place by them. The simulation results show that the algorithm of a restriction area management achieves better performance than other ones.

GIS-based Water Pollution Analysis (GIS기반의 오폐수 분석에 관한 연구)

  • Lee, Chol-Young;Kim, Kye-Hyun;Park, Tae-Og
    • 한국공간정보시스템학회:학술대회논문집
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    • 2007.06a
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    • pp.111-116
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    • 2007
  • 현재 한강수계를 제외한 3대강 수계에서 수질오염총량관리제도가 의무제로써 시행되고 있다. 그러나 과학적 타당성과 외국의 성공사례들로 하여금 한강수계에 대해서도 수질오염총량제도를 의무제화 하려는 시도가 추진되고 있고 있는 실정이다. 이 제도가 한강수계에도 도입된다면, 한강권역에 포함되는 모든 지자체는 해당 유역에서 하천으로 유입되는 배출부하량을 할당받은 할당부하량 이하로 관리하여야만 정해진 유역의 목표수질을 달성할 수 있으며, 배출부하량 관리를 계획한데로 이행하지 못한 지자체는 범칙금 내지는 행정제재를 받게 된다. 따라서 체계적이고 과학적인 모니터링 및 분석 수단이 필요하다. 이 연구는 환경부 고시 한강기술지침에 의거하여 GIS를 이용하여 인천일대의 오폐수 발생부하량 및 배출부하량을 제시하고 과학적인 오염물질 삭감방안을 모색하는 것을 목적으로 진행되었다. 생활계, 산업계, 축산계, 양식계의 4 가지로 분류된 점오염원과 토지 이용 분류에 따른 비점오염원에 대한 각각의 발생부하량을 GIS를 통해 산정하고, 모든 오염원별로 처리경로를 고려하고 처리시설별, 방법별 삭감 효율을 반영하여 배출부하량을 산정하여 GIS상에서 제시하고 분석하였다. 인천일대는 인근지역에 비해 인구밀도가 높고 산업단지가 발달하여 생활계와 산업계 오염원에 의한 발생부하량 및 배출부하량이 많았으며, 특정 오염물에 대해서는 삭감 계획이 필요함을 확인할 수 있었다. 따라서 수질오염총량관리제도에 대비하고 실제 수질 개선을 위하여 본 연구의 결과를 바탕으로 수질관리를 위한 시스템의 보완 및 삭감계획의 수립에 관한 연구가 필요하다.알 수 있었다. 이상의 결과를 토대로 기존 압출추출방법과 초임계 추출 방법을 비교한 결과 $\gamma$-토코페롤의 농도가 1.3${\~}$1.6배 증가함을 확인할 수 있었다.게 상관성이 있어 앞으로 심도 있는 연구가 더욱 필요하다.qrt{F}}}{\pm}e_0$)에서 단정도실수 및 배정도실수의 역수 제곱근 계산에 필요한 평균 곱셈 횟수를 계산한다 이들 평균 곱셈 횟수를 종래 알고리즘과 비교하여 본 논문에서 제안한 알고리즘의 우수성을 증명한다. 본 논문에서 제안한 알고리즘은 오차가 일정한 값보다 작아질 때까지만 반복하므로 역수 제곱근 계산기의 성능을 높일 수 있다. 또한 최적의 근사 역수 제곱근 테이블을 구성할 수 있다. 본 논문의 연구 결과는 디지털 신호처리, 컴퓨터 그라픽스, 멀티미디어, 과학 기술 연산 등 부동소수점 계산기가 사용되는 분야에서 폭 넓게 사용될 수 있다.>16$\%$>0$\%$ 순으로 좋게 평가되었다. 결론적으로 감농축액의 첨가는 당과 탄닌성분을 함유함으로써 인절미의 노화를 지연시키고 저장성을 높이는데 효과가 있는 것으로 생각된다. 또한 인절미를 제조할 때 찹쌀가루에 8$\%$의 감농축액을 첨가하는 것이 감인절미의 색, 향, 단맛, 씹힘성이 적당하고 쓴맛과 떫은맛은 약하게 느끼면서 촉촉한 정도와 부드러운 정도는 강하게 느낄수 있어서 전반적인 기호도에서 가장 적절한 방법으로 사료된다.비위생 점수가 유의적으로 높은 점수를 나타내었다. 조리종사자의 위생지식 점수와 위생관리

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A Hardware Barrier Synchronization using Multi -drop Scheme in Parallel Computer Systems (병렬 컴퓨터 시스템에서의 Multi-drop 방식을 사용한 하드웨어 장벽 동기화)

  • Lee, June-Bum;Kim, Sung-Chun
    • Journal of KIISE:Computer Systems and Theory
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    • v.27 no.5
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    • pp.485-495
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    • 2000
  • The parallel computer system that uses parallel program on the application such as a large scale business or complex operation is required. One of crucial operation of parallel computer system is synchronization. A representative method of synchronization is barrier synchronization. A barrier forces all process to wait until all the process reach the barrier and then releases all of the processes. There are software schemes, hardware scheme, or combinations of these mechanism to achieve barrier synchronization which tends to use hardware scheme. Besides, barrier synchronization lets parallel computer system fast because it has fewer start-up overhead. In this paper, we propose a new switch module that can implement fast and fault-tolerant barrier synchronization in hardware scheme. A proposed barrier synchronization is operated not in full-switch-driven method but in processor-driven method. An effective barrier synchronization is executed with inexpensive hardware supports. Therefore, a new proposed hardware barrier synchronization is designed that it is operated in arbitrary network topology. In this paper, we only show comparison of barrier synchronization on Multistage Interconnection Network. This research results in 24.6-24.8% reduced average delay. Through this result, we can expect lower average delay in irregular network.

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A Study on the high-speed Display of Radar System Positive Afterimage using FPGA and Dual port SRAM (FPGA와 Dual Port SRAM 적용한 Radar System Positive Afterimage 고속 정보 표출에 관한 연구)

  • Shin, Hyun Jong;Yu, Hyeung Keun
    • Journal of Satellite, Information and Communications
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    • v.11 no.4
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    • pp.1-9
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    • 2016
  • This paper was studied in two ways with respect to the information received from the video signal separation technique of PPI Scop radar device. The proposed technique consists in generating an image signal through the video signal separation and synthesis, symbol generation, the residual image signal generation process. This technology can greatly improve the operating convenience with improved ease of discrimination, screen readability for the operator in analyzing radar information. The first proposed method was constructed for high-speed FPGA-based information processing systems for high speed operation stability of the system. The second proposed method was implemented intelligent algorithms and a software algorithm function curve associated resources.This was required to meet the constraints on the radar information, analysis system. Existing radar systems have not the frame data analysis unit image. However, this study was designed to image data stored in the frame-by-frame analysis of radar images with express information MPEG4 video. Key research content is to highlight the key observations expresses the target, the object-specific monitoring information to the positive image processing algorithm and the function curve delays. For high-definition video, high-speed to implement data analysis and expressing a variety of information was applied to the ARM Processor Support in Pro ASIC3.