• Journal of the Korea Society of Computer and Information
• /
• v.3 no.4
• /
• pp.55-62
• /
• 1998

This Paper proposed a systolic Arrays architecture for computing Romberg's integration method. It consists of systolic arrays of two stage, one for integration by Trapezoidal rule and the other for integration by using Richardson's extrapolation. the proposed its architecture is very high speed and regular. This paper illustrates how " mathematical hardware " package, as well as software library routines, may be part of the mathematical problem solver's tool kit in the future.he future.

• Proceedings of the Korean Information Science Society Conference
• /
• 2004.10a
• /
• pp.649-651
• /
• 2004

본 논문은 메모리 집적도의 증가로 인해 많이 발생하는 이웃 패턴 감응 고장에 대한 효율적인 테스팅 방법을 제안하고 있다. 기존의 테스팅 방법에서는 비트 단위의 순차적인 셀 어레이 접근으로 인해 결함 검출율과 테스팅 시간에 있어서 문제를 가지고 있다. 이러한 문제들을 본 논문에서는 이웃 패턴 감응 고장을 효율적으로 검출 할 수 있는 타일 방식으로 셀 어레이를 구분하여 이웃 셀의 영역을 제한한다 그리고 기본 셀과 이웃 셀에 필요한 패턴을 병렬로 입출력시킬 수 있는 병렬 접근 디코더와 검출기를 설계함으로써 전체 테스팅 시간을 줄이고 결함 검출율을 높일 수 있는 방법을 제안한다.

• Proceedings of the Optical Society of Korea Conference
• /
• 2003.07a
• /
• pp.118-119
• /
• 2003

조명각 변조방식에 의한 3차원 디스플레이 모듈의 구성요소는 back light unit(BLU), stripe-patterned LC shutter, lenticular lens sheet이다. 이런 3차원 디스플레이 에서 조명각도의 올바른 변조를 위해서는 stripe-patterned LC shutter, lenticular lens sheet 상호 결합이 가장 중요하다. 그림 1 은 이러한 입체영상 module의 개념도이다. 그림과 같이 LC shutter위에 적절한 렌티큘러 렌즈 어레이를 설치할 때, 줄무늬 모양의 면 광원에서 방출된 빛이 한번은 정확히 오른쪽 눈으로 다음 번에는 왼쪽 눈으로 향하게 하여 양안 시차에 의해 3D영상이 보이도록 하는 것이 이 모듈의 핵심원리이다. (중략)

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2014.10a
• /
• pp.857-860
• /
• 2014

This paper proposes a human movement detection system by a thermopile array sensor. In the system, the sensor is attached to the ceiling and it acquires spatial temperatures, which is called thermal distribution. The system obtains $4{\times}4$ pixels thermal distributions from the sensor. The distributions are analyzed to extract human movement. As the experimental result, the proposed system successfully detected human movements.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2022.11a
• /
• pp.27-29
• /
• 2022

최근 인공지능 애플리케이션이 많이 사용되고 이러한 애플리케이션에서 데이터 희소성이 높아지고 있어 이러한 희소 데이터를 효율적으로 처리하기 위한 하드웨어 구조들이 많이 소개되고 있다. 본 논문에서는 희소 데이터 처리 시 전력 소모량을 낮출 수 있는 새로운 하드웨어 구조를 제안한다. 일반적인 인공지능 하드웨어에서 많이 사용되는 시스톨릭 어레이 구조를 기반으로 하며, 제안된 저전력 PE 가 희소 데이터 처리시 희소하지 않은 데이터 처리 시보다 최대 2 배의 전력 소모량을 줄일 수 있는 것으로 나타났다.

• Journal of the Korea Convergence Society
• /
• v.9 no.6
• /
• pp.203-207
• /
• 2018

This paper deals with the design and development of a lens system capable of imaging an infrared image of $3{\sim}5{\mu}m$ wavelength bands with a focal length of 24mm and good atmospheric transmission characteristics. The design used CodeV, a commercial design program, and the optimization is carried out with weighting to eliminate chromatic aberration, spherical aberration and distortion. The designed lens system consists of two lenses consisting of Si and Ge. Each lens has an aspherical surface on one side. And this optical system has the resolution of the characteristics that the MTF value is 0.40 at the line width of 29lp/mm and the MTF value is 0.25 at the line width of 20lp/mm. This optical system is considered to have the capability to be applied to the thermal imaging camera for MWIR using the $206{\times}156$ array infrared detector of $25{\mu}m$ pixels and the $320{\times}240$ array infrared detector of $17{\mu}m$ pixels.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.27 no.3
• /
• pp.108-115
• /
• 1990

This paper describes the design and fabrication of a processing element that will be used as a component in the construction of a two dimensional systolic for FFT. The chip performs data shuffling and radix-2 decimation-in-time (DIT) butterfly arithmetic. It consists of a data routing unit, internal control logic and HBA unit which computes butterfly arithmetic. The 6.5K transistors processing element designed with standard cells has been fabricated with a 2u'm double metal CMOS process, and evaluated by wafer probing measurements. The measured characteristics show that a HBA can be computed in 0.5 usec with a 20MHz clok, and it is estimated that the FFT of length 1024 can be transformed in 11.2 usec.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.26 no.11
• /
• pp.1672-1678
• /
• 2022

In this paper, the relay antenna was designed in consideration of the performance of the 28GHz band 5G mobile communication relay horn antenna, such as radiation pattern and return loss. A horn array for 5G mobile communication repeater was designed by arranging the antenna elements in phase, and the performance was analyzed. Unlike conventional WCDMA (3G) and LTE (4G), in millimeter wave band communication, high path loss occurs between transmission and reception. In the design of a 5G millimeter wave horn antenna, antenna performance such as isolation and gain between antenna elements as well as gain and bandwidth of the antenna must be additionally considered. The antenna gain of the single horn antenna (1×1) and the array horn antenna (2×4) in the 28GHz band is about 10.44d Bi and 19.58dBi, respectively, and the return loss is designed to be less than -18dB. It has proven its validity and has been shown to be suitable for application to 5G mobile communication relay system.

• Journal of the Institute of Convergence Signal Processing
• /
• v.8 no.4
• /
• pp.285-292
• /
• 2007

SoC which deploys software modules as well as hardware IPs on a single chip is a major revolution taking place in the implementation of a system design, and high-level synthesis is an important process of SoC design methodology. Recently, SPARK parallelizing high-level synthesis software tool has been developed. It takes a behavioral ANSI-C code as an input, schedules it using code motion and various code transformations, and then finally generates synthesizable RTL VHDL code. Although SPARK employs various loop transformation algorithms, the synthesis results generated by SPARK are not acceptable for basic signal and image processing algorithms with nested loop. In this paper we propose a SoC platform with an application-specific PLD targeting local operations which are feature of many loop algorithms used in signal and image processing, and demonstrate design process which maps behavioral specification with nested loops written in a high-level language (ANSI-C) onto 2D systolic array. Finally the derived systolic array is implemented on the proposed application-specific PLD of SoC platform.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.39 no.3
• /
• pp.140-149
• /
• 2002

This paper describes the characteristics of beam-tilting slot away waveguide antennas for mobile DBS reception. As a basic study of slotted waveguide array, design for 16 slot elements located on a broad-wall waveguide is considered. Design parameters such as slot length, space between each slot and cross slot angle of antennas with the beam-tilting characteristics are calculated by method of moments. Based on these results, the radiation waveguide antennas with 16-element $\times$16-array are designed and fabricated. The measured main beam direction angles of the fabricated antennas are 48$^{\circ}$to 50$^{\circ}$depending on the measured frequencies and it shows good agreement with prediction. The measured 3 dB beam width of elevation pattern is about 13$^{\circ}$, and the axial ratio and the gain measured at DBS band are observed 2.8 dB below and 24 dBi above, respectively. In order to evaluate a performance of the fabricated waveguide planar antenna, it is combined with the satellite tracking control system and the field performance test of antenna mounted on a mobile vehicle is carried out at highway. During the measurement, it was possible to watch television without a break signal in a driving vehicle and an excellent performance of the proposed antennas was demonstrated.