• Proceedings of the Korean Institute of Navigation and Port Research Conference
• /
• 2022.11a
• /
• pp.362-365
• /
• 2022

With the development of the 4th industrial revolution technology, smartization in various fields is accelerating. The shipping and logistics industry is also promoting smartization by combining advanced new technologies such as digital twin, Internet of Things, and artificial intelligence. In Korea, the Ministry of Maritime Affairs and Fisheries is promoting a strategy to spread the smart shipping logistics system in line with the changing global shipping logistics trend, and through this, it is creating a foundation for smart shipping logistics. This study aims to present the concept of a communication tool that recognizes the importance of communication between each logistics entity and exchanges opinions between logistics entities in a virtual digital twin environment to cope with the changing shipping logistics process. In addition, for the development of these communication tools, this study derive a software design model, including architecture.

• Convergence Security Journal
• /
• v.24 no.1
• /
• pp.21-26
• /
• 2024

The security model in the previous network environment has a vulnerability in which resource access control for trusted users is not properly achieved using the Perimeter model based on trust. The Zero Trust is an absolute principle to assume that the users and devices accessing internal data have nothing to trust. Applying the Zero Trust principle is very successful in reducing the attack surface of an organization, and by using the Zero Trust, it is possible to minimize damage when an attack occurs by limiting the intrusion to one small area through segmentation. ZTNA is a major technology that enables organizations to implement Zero Trust security, and similar to Software Defined Boundary (SDP), ZTNA hides most of its infrastructure and services, establishing one-to-one encrypted connections between devices and the resources they need. In this study, we review the functions and requirements that become the principles of the ZTNA architecture, and also study the security requirements and additional considerations according to the construction and operation of the ZTNA solution.

• Convergence Security Journal
• /
• v.24 no.2
• /
• pp.79-87
• /
• 2024

This paper addresses the increasing cyber attacks exploiting security vulnerabilities in software due to the rise in web applications. CSRF (Cross-Site Request Forgery) attacks pose a serious threat to web users and developers and must be prevented in advance. CSRF involves performing malicious requests without the user's consent, making protection methods crucial for web applications. This study compares and verifies the CSRF defense performance of two frameworks, Spring Security and Apache Shiro, to propose an effectively applicable framework. The results show that both frameworks successfully defend against CSRF attacks; however, Spring Security processes requests faster, averaging 2.55 seconds compared to Apache Shiro's 5.1 seconds. This performance difference stems from variations in internal processing methods and optimization levels. Both frameworks showed no significant differences in resource usage. Therefore, Spring Security is more suitable for environments requiring high performance and efficient request processing, while Apache Shiro needs improvement. These findings are expected to serve as valuable references for designing web application security architectures

• The Journal of Bigdata
• /
• v.8 no.2
• /
• pp.55-71
• /
• 2023

Cloud Native refers to the Technical Maturity Level of a cloud environment that can utilize all cloud resources to fully function. In converting public sector information resources to the cloud, the characteristics of the cloud are not being used well. Therefore, in this study, the qualitative research method cloud expert interview technique and the quantitative research method used text network analysis for domestic and foreign related articles. Through this, we analyzed the utilization trends related to domestic and foreign cloud natives and the cloud policies of developed countries. Through previous research, the core components of cloud-native were examined, and the need for agile methodologies that were not addressed in previous studies was raised. It is believed that these core components will be applied in the public sector to contribute to business innovation through digital innovation. In addition, this study aims to provide important implications for the use of cloud native in Korea through an in-depth discussion on how to spread cloud native in the public sector.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.34 no.4
• /
• pp.629-639
• /
• 2024

CHAM is designed with an emphasis on encryption speed, considering that in the ISO/IEC standard block cipher operation mode, encryption functions are used more often than decryption functions. In the superscalar architecture of modern general-purpose processors, different ordering of operations can lead to different processing speeds, even if the computation configuration is the same. In this paper, we analyze the implementation efficiency and security of CHAM-like structures, which rearrange the order of operations in the ARX-based block cipher CHAM, for single-block and parallel implementations in a general-purpose processor environment. The proposed structures are at least 9.3% and at most 56.4%efficient in terms of encryption speed. The security analysis evaluates the resistance of the CHAM-like structures to differential and linear attacks. In terms of security margin, the difference is 3.4% for differential attacks and 6.8%for linear attacks, indicating that the security strength is similar compared to the efficiency difference. These results can be utilized in the design of ARX-based block ciphers.

• Journal of KIISE:Software and Applications
• /
• v.37 no.6
• /
• pp.430-445
• /
• 2010

Effective service description and modeling methodologies are essential for dynamic service composition to provide autonomous services for users in ubiquitous computing environments. In our previous research, we proposed a 'u-Service' as an abstract and structured concept for operations of devices in ubiquitous environments. In addition, we established the mechanism to structure u-Services as an ontology and the description specification to represent attributes of u-Services. However, it did not provide enough methods or standards to analyze and evaluate the effectiveness of the u-Service ontology in the design time. Since existing quality models for software products or computing systems cannot consider characteristics of ubiquitous services, they are not suitable for ubiquitous service ontology. Therefore, in this paper, we propose a quality evaluation model to design and modeling a good ubiquitous service ontology, based on our u-Service ontology building process. We extract modeling goals and evaluation indicators according to characteristics of ubiquitous service ontology, and establish quality metrics to quantify each quality sub-characteristics. The experiment result of the proposed quality evaluation model for u-Service ontologies which are constructed for our previous works shows that we can analyze the design of ubiquitous service ontology from various angles, and indicate recommendations for improvement.

• The Journal of the Korea Contents Association
• /
• v.12 no.8
• /
• pp.411-419
• /
• 2012

In case that R&D results from R&D projects are well managed and archived, the research institutes can transfer the valuable technologies related to R&D results with some costs to corporations. However, it is still difficult to maintain and reuse R&D results because they are managed by each person or each department and not integrated between R&D results. Therefore, the government should undertake to manage R&D results overall by collecting meta data and distribute analyzed information from meta data. Each researching institute also makes an efforts to manage R&D results focusing on their reusing. For this purpose, in this paper, we present a process to manage R&D results; insert meta data of R&D results to the system, upload files of R&D results to the database of the system, inquire, and use meta data of R&D results. Based on the process, we design a system architecture for managing R&D results. In addition, it should be mainly considered to design a global schema for integrating R&D results into one database. The system shows detailed information on R&D results and provides R&D results conveniently to users. We expect that we may reduce the cost of reusing R&D results and improve the quality of R&D results with designing efficiently a process and a global schema of R&D result management system.

• The KIPS Transactions:PartD
• /
• v.10D no.3
• /
• pp.407-416
• /
• 2003

As the usage of database systems dramatically increases and the amount of data pouring into them is massive, the performance administration techniques for using database systems effectively are getting more important. Especially in data warehouses, the performance management is much more significant mainly because of large volume of data and complex queries. The objectives and characteristics of data warehouses are different from those of other operational systems so adequate techniques for performance monitoring and tuning are needed. In this paper we extend functionalities of the DBMax, a performance administration tool for Oracle database systems, to apply it to data warehouse systems. First we analyze requirements based on summary management and ETL functions they are supported for data warehouse performance improvement in Oracle 9i. Then, we design architecture for extending DBMax functionalities and implement it. In specifics, we support SQL tuning by providing details of schema objects for summary management and ETL processes and statistics information. Also we provide new function that advises useful materialized views on workload extracted from DBMax log files and analyze usage of existing materialized views.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.48 no.1
• /
• pp.90-100
• /
• 2011

We present a parallel bi-conjugate gradient (Bi-CG) matrix solver for large scale Bio-FET simulations based on recent graphics processing units (GPUs) which can realize a large-scale parallel processing with very low cost. The proposed method is focused on solving the Poisson equation in a parallel way, which requires massive computational resources in not only semiconductor simulation, but also other various fields including computational fluid dynamics and heat transfer simulations. As a result, our solver is around 30 times faster than those with traditional methods based on single core CPU systems in solving the Possion equation in a 3D FDM (Finite Difference Method) scheme. The proposed method is implemented and tested based on NVIDIA's CUDA (Compute Unified Device Architecture) environment which enables general purpose parallel processing in GPUs. Unlike other similar GPU-based approaches which apply usually 32-bit single-precision floating point arithmetics, we use 64-bit double-precision operations for better convergence. Applications on the CUDA platform are rather easy to implement but very hard to get optimized performances. In this regard, we also discuss the optimization strategy of the proposed method.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.44 no.10
• /
• pp.7-16
• /
• 2007

In this paper, we introduce a new design environment for efficient multiprocessor system-on-chip design space exploration. The design environment takes a process network model as input system specification. The process network model has been widely used for modeling signal processing applications because of its excellent modeling power. However, it has limitation in predictability, which could cause severe problem for real time systems. This paper proposes a new approach that enables static analysis of a process network model by converting it to a hierarchical synchronous dataflow model. For efficient design space exploration in the early design step, mapping application to target architectures has been a crucial part for finding better solution. In this paper, we propose an efficient mapping algorithm. Our mapping algorithm supports both single bus architecture and multiple bus architecture. In the experiments, we show that the automatic conversion approach of the process network model for static analysis is performed successfully for several signal processing applications, and show the effectiveness of our mapping algorithm by comparing it with previous approaches.