• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.4A
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• pp.325-329
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• 2007

In this paper, the modem based on EIA-709.2-A PL of powerline communication techniques which are considered to be important technologies for in-home control network systems was implemented via VHDL. In order to have the robust properties against existing noises over powerline channels, the information data using eight symbols was transmitted by transmitter and the receiver is composed of matched filter, averager, decision and detection parts in order to detect the right data from the received signals. The implemented PLC transceiver was downloaded into Altera's EP1S25C672 FPGA and the operation was verified successfully.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1998.11a
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• pp.398-402
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• 1998

본 논문에서는 유ㆍ무선 통신 채널을 통한 데이터 전송시 발생하는 비선형 왜곡을 적응 필터를 이용하여 보상하였다. 특히 통신채널에서는 심볼간 간섭(ISI)이 발생하는데 이러한 간섭을 비선형 필터를 이용하여 제거하였다. 비선형 채널을 모델링하는 방법에는 볼테라급수를 이용하는 방법과 쌍선형 방법이 있다. 쌍선형 방법은 볼테라 방법에 비하여 계산량이 적은 장점을 지니고 있다. 따라서 쌍선형 필터에 적응 알고리듬을 적용하여 신호의 왜곡을 보상하였다. 적응 알고리듬에는 LMS 계열과 LS 계열 알고리듬이 있으나 통신 채널에서는 알고리듬의 안정도가 중요하므로 LMS 계열 알고리듬을 적용하였다. 또한 적응 알고리듬은 입력 데이터의 상관성과 데이터 수에 의존하여 수렴속도와 안정도가 결정된다. 알고리듬의 수렴속도를 증가시키기 위하여 입력신호를 신호파형으로부터 다량의 데이터를 검출하는 방법을 적용하였다. 이러한 방법을 입증하기 위하여 입력신호는 2진 랜덤 가우시안 데이터를 이용하였고, 통신채널에서 채널간 간섭을 발생시켰으며 화이트 가우시안 잡음을 부가 시켰다. 이러한 신호를 수신한 수신기에 적응 등화기를 설계하여 대량의 데이터를 생성시키고, 적응 알고리듬을 적용하여 채널의 왜곡을 빠른 속도로 보상하였다.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.4 no.4
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• pp.286-294
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• 2011

Cable modems typically are implemented by a forward error correction(FEC) scheme. The ITU-T Recommendation J-38 Annex B specifies using 64- and 256- quadrature amplitude modulation (QAM) and extended RS coding scheme. In implementing the cable modem, there are some problems to fabricate and fitting on FPGA chip. First, many clocks are needed in implementing cable modem because of different code rate and different modulation types. To reduce the number of clocks, we use the two memories, which are different clock speed for reading and writing data. Second, this system lost the bit-synchronization and frame-synchronization in decoder, the system recognize that all data is error. This paper solves the problems by using simple 5-stage registers and unique sync-word. Based on solutions for about problems, the cable modem is fabricated on FPGA chip name as Vertex II pro xc2vp30-5 by Xilinx, and we confirmed the effectiveness of the results.

• Journal of IKEEE
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• v.24 no.3
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• pp.838-844
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• 2020

In this paper, we propose an efficient Viterbi processor using Joint Viterbi detection and decoding (JVDD) algorithm for a for bluetooth low energy (BLE) system. Since the convolutional coded Gaussian minimum-shift keying (GMSK) signal is specified in the BLE 5.0 standard, two Viterbi processors are needed for detection and decoding. However, the proposed JVDD scheme uses only one Viterbi processor by modifying the branch metric with inter-symbol interference information from GMSK modulation; therefore, the hardware complexity can be significantly reduced without performance degradation. Low-latency and low-complexity hardware architecture for the proposed JVDD algorithm was proposed, which makes Viterbi decoding completed within one clock cycle. Viterbi Processor RTL synthesis results on a GF55nm process show that the gate count is 12K and the memory unit and the initial latency is reduced by 33% compared to the modified state exchange (MSE).

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.477-480
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• 2005

CMA-DD is proposed to improve the steady-state performance of CMA and its performance is depending on switching time between two modes of operation. Castro et al. who proposed a concurrent equalizer for solving problem of CMA-DD, which reduced the sensibility of switching time. However, concurrent algorithm has a problem that it keeps working after convergence. In this paper, we propose concurrent MCMA-DD equalizer combined modified CMA(MCMA) and DD mode for making better concurrent algorithm. The proposed equalizer is better than previous algorithm in convergence speed and steady-state performance. Also, the proposed algorithm decides optimum switching time using residual ISI of the equalizer output.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.7
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• pp.685-691
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• 2003

This paper newly analyzes the effect of the phase noise in the frequency synthesizer on the performance of SFH/M-NCFSK system by standard frequency deviation(equation omitted) when noncoherent FSK demodulation of the square-law detector is considered. We derive the SER in the SFH system and analyze the effect of phase noise on the SFH/M-NCFSK system performance according to the hopping frequency spacing (1/T$\_$h/) and the variation of the standard frequency deviation (equation omitted). The required SNR is about 13.4 dB to meet Ps=10$\^$-3/ when the standard frequency deviation is about 4.0 Hz and the hopping frequency spacing (1/T$\_$h/) in the SFH/2-NCFSK system is 30. So, there is about 2.4 dB power penalty than the phase noise-free system. If the hopping frequency spacing 1/T$\_$h/ is under 30, the error floor may happen and SER considerably grows up. We show that the analytic results closely match with the simulation results.

• The Journal of the Acoustical Society of Korea
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• v.35 no.5
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• pp.368-374
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• 2016

This paper presents constructing transmitter and receiver by using a direct sequence spread spectrum techniques to DPSK (Differential Phase-Shift Keying) scheme in underwater acoustic communication. Since DPSK signal can be demodulated if the receiver knows only the phase difference between the adjacent bits, DPSK receiver structure has the advantage of being simplified. In the conventional receiver, two adjacent symbols of transmitted signal before despread are passed to the transition correlator that detects data by comparing maximum correlation outputs. At this time, the error for maximum value of the correlator output may increase because of low SNR (Signal to Noise Ratio) or high Doppler shift frequency according to the underwater channel. In this paper, we propose a method for accurate detection result using the width as well as the magnitude among outputs produced by the correlator. The performances of the proposed method was evaluated by simulation and lake trial data.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.12A
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• pp.1774-1780
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• 2000

본 논문에서는 TDMA 방식의 고속의 버스트 데이터 전송에서 프리앰블의 오버샘플링 데이터 값을 이용한 새로운 피드포워드 타이밍 추정 기법을 제안한다. 제안된 추정 기법은 검출 오류 분산 값 (DEV : Detection Error Variance) 측면에서 기존의 여러 타이밍 추정기법과 MCRB (Modified Cramer-Rao Bound)와 비교되어 진다. 또한, 제안된 타이밍 추정 기법을 고정 샘플링 클럭과 타이밍 보정기로서 보간 필터를 이용한 심볼 동기 블록을 적용하여 이상적인 경우의 BER과 그 성능을 비교한 결과 이상적인 경우에 비해 성능 저하가 BER이 $10^{-3}$인 지점에서 최대 0.2dB 이내임을 확인하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.3
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• pp.442-450
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• 1994

In this paper, the tracking of SFH/MFSK signals by using a paeallel correlator and a bank of BPF which is implemented by DFT recursively is studied. During symbol period, M-ary signal`s spectrum is analyzed by the step of n multiple of sampling period. The bank of BPF output which is stored for hop duration input to the parallel correlator. The time difference of the receiver and the transmitter is corrected by using sampling position and correlation time at which the largest output of correlator is generated. Syncronization signal detection rate and distribution of the largest output of correlator are evaluated by computer simulation in HF channel evironments for the performance analysis of proposed tracking method.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.1
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• pp.69-77
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• 1989

A hologram scanner for POS bar code symb9ol readers has been developed. This system is composed of scanning optics, optical detector, video signal circuitary and preprocessor. In contrast to conventional scanners using polygonal mirrors, which complicate the scanning optics, the hologram scanner developed in this research was made up with simple optics and higher reading performance was achieved. And in order to read abar code symbol omnidirectionally with highdensity scan patterns, the new real time decoding technique was proposed. The advantage of this technique is less hardware and lower clock rate. High speed processing and improved readability for tilted symbol was confirmed experimentally.