• Title/Summary/Keyword: 실리콘 질화막

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The oxidation of silicon nitride layer (실리콘 질화막의 산화)

  • 정양희;이영선;박영걸
    • Electrical & Electronic Materials
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    • v.7 no.3
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    • pp.231-235
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    • 1994
  • The multi-dielectric layer $SiO_2$/$Si_3{N_4}$/$SiO_2$ (ONO) is used to improve charge retention and to scale down the memory device. The nitride layer of MNOS device is oxidize to form ONO system. During the oxidation of the nitride layer, the change of thickness of nitride layer and generation of interface state between nitride layer and top oxide layer occur. In this paper, effects of oxidation of the nitride layer is studied. The decreases of the nitride layer due to oxidation and trapping characteristics of interface state of multi layer dielectric film are investigated through the C-V measurement and F-N tunneling injection experiment using SONOS capacitor structure. Based on the experimental results, carrier trapping model for maximum flatband voltage shift of multi layer dielectric film is proposed and compared with experimental data. As a results of curve fitting, interface trap density between the top oxide and layer is determined as being $5{\times}10^11$~$2{\times}10^12$[$eV^1$$cm^2$].

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Characteristics of Crystalline Silicon Solar Cells with Double Layer Antireflection Coating by PECVD (결정질 실리콘 태양전지의 이중 반사방지막 특성에 대한 연구)

  • Kim, Jin-Kuk;Park, Je-Jun;Hong, Ji-Hwa;Kim, Nam-Soo;Kang, Gi-Hwan;Yu, Gwon-Jong;Song, Hee-Eun
    • 한국태양에너지학회:학술대회논문집
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    • 2012.03a
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    • pp.243-247
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    • 2012
  • The paper focuses on an anti-reflection (AR) coating deposited by PECVD in silicon solar cell fabrication. AR coating is effective to reduce the reflection of the light on the silicon wafer surface and then increase substantially the solar cell conversion efficiency. In this work, we carried out experiments to optimize double AR coating layer with silicon nitride and silicon oxide for the silicon solar cells. The p-type mono crystalline silicon wafers with $156{\times}156mm^2$ area, 0.5-3 ${\Omega}{\cdot}cm$ resistivity, and $200{\mu}m$ thickness were used. All wafers were textured in KOH solution, doped with $POCl_3$ and removed PSG before ARC process. The optimized thickness of each ARC layer was calculated by theoretical equation. For the double layer of AR coating, silicon nitride layer was deposited first using $SiH_4$ and $NH_3$, and then silicon oxide using $SiH_4$ and $N_2O$. As a result, reflectance of $SiO_2/SiN_x$ layer was lower than single $SiN_x$ and then it resulted in increase of short-circuit current and conversion efficiency. It indicates that the double AR coating layer is necessary to obtain the high efficiency solar cell with PECVD already used in commercial line.

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Passivation Layer Structures with a Silicon Nitride film (질화실리콘막을 사용한 표면보호층 구조에 관한 연구)

  • 이종무
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.6
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    • pp.53-57
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    • 1985
  • Comparisons and analyses were made of the properties of double or triple passivation layer structures composed of APCVD SiOt or PSG and PECVD SiN films with various layer combinations and layer thicknesses. As a result of the analyses of the pro.peHics such as threshold-voltage shift, crack resistance, pinhole density, and moisture reslstancei a con-clusion was reached that the proper passivation layer structure is the double layer consisting of a 4,00$\AA$ or thicker PSG film and a 6,000$\AA$ SiN film.

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A Study on Batch-Type Remote Plasma Dry Cleaning Process for Native Oxide Removal (배치식 플라즈마 세정 설비를 이용한 자연산화막 제거 공정)

  • Park, Jae-Young;Yi, Wook-Yeol;Hyung, Yong-Woo;Nam, Seok-Woo;Lee, Hyeon-Deok;Song, Chang-Lyong;Kang, Ho-Kyu;Roh, Yong-Han
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.247-251
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    • 2004
  • 반도체 소자의 제조에 있어 실리콘 표면에 성장한 자연산화막을 제거하기 위해 일반적으로 습식 세정 기술이 이용되어 왔다. 하지만 소자의 최소 선폭(design rule)이 nano급으로 고집적화 됨에 따라 contact hole 바닥의 자연산화막을 깨끗이 제거하는데 있어서 그 한계를 나타나고 있다. 이에 대한 효과적인 대안 공정으로 가스 건식 세정 기술이 연구되고 있다. 본 논문에서는 한 번에 50매 이상의 웨이퍼를 처리함으로써 생산성 측면에서 월등한 배치식 설비에서 원거리 플라즈마(remote plasma) 장치에서 2.450Hz의 마이크로웨이브(${\mu}$-wave)에 의해 형성시킨 수소라디칼과 $NF_3$ 가스를 이용하여 실리콘에 결함을 주지 않고 자연산화막을 선택적으로 제거하는 공정에 대해 고찰하였다. AFM을 이용한 표면분석, TEM을 이용한 물성분석, 그리고 ToF-SIMS 및 XPS를 이용한 화학 분석을 습식 및 건식 세정을 비교 평가한 결과, 건식 세정 공정이 실리콘 표면에 결함을 주지 않고 자연산화막을 제거 할 수 있음을 확인하였다. 산화막$(SiO_2)$, 질화막$(Si_3N_4)$, 그리고 다결정 실리콘(Poly-Si) 등의 각 막질별 식각 특성을 고찰하였으며, $NH_3$의 캐리어 가스인 $N_2$의 주입량을 조절함으로써 수소라디칼 형성 효율의 개선이 가능하였으며, 이로부터 게이트와 소스/드레인 사이를 절연하기 위해 이용되는 질화막의 식각 선택비를 2배 정도 개선할 수 있었다. nano급 소자에 실장하여 평가한 결과에서 불산(HF)에 의한 습식 세정 방식에 비하여 약 $20{\sim}50%$ 정도의 contact 저항 감소 효과가 있음이 확인되었다.두 소자 모두 $40mA/cm^2$ 에서 이상적인 화이트 발란스와 같은(0.33,0.33)의 색좌표를 보였다.epsilon}_0=1345$의 빼어난 압전 및 유전특성과 $330^{\circ}C$의 높은 $T_c$를 보였고 그 조성의 vibration velocity는 약4.5 m/s로 나타났다.한 관심이 높아지고 있다. 그러나 고 자장 영상에서의 rf field 에 의한 SAR 증가는 중요한 제한 요소로 부각되고 있다. 나선주사영상은 SAR 문제가 근원적으로 발생하지 않고, EPI에 비하여 하드웨어 요구 조건이 낮아 고 자장에서의 고속영상방법으로 적합하다. 본 논문에서는 고차 shimming 을 통하여 불균일도를 개선하고, single shot 과 interleaving 을 적용한 multi-shot 나선주사영상 기법으로 $100{\times}100$에서 $256{\times}256$의 고해상도 영상을 얻어 고 자장에서 초고속영상기법으로 다양한 적용 가능성을 보였다. 연구에서 연구된 $[^{18}F]F_2$가스는 친핵성 치환반응으로 방사성동위원소를 도입하기 어려운 다양한 방사성의 약품개발에 유용하게 이용될 수 있을 것이다.었으나 움직임 보정 후 영상을 이용하여 비교한 경우, 결합능 변화가 선조체 영역에서 국한되어 나타나며 그 유의성이 움직임 보정 전에 비하여 낮음을 알 수 있었다. 결론: 뇌활성화 과제 수행시에 동반되는 피험자의 머리 움직임에 의하여 도파민 유리가 과대평가되었으며 이는 이 연구에서 제안한 영상정합을 이용한 움직임 보정기법에 의해서 개선되었다. 답이 없는 문제, 문제 만들기, 일반화가 가능한 문제 등으로 보고, 수학적 창의성 중 특히 확산적 사고에 초점을 맞추어 개방형 문제가 확

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Hemispherical Grained Silicon formation Condition on In-Situ Phosphorous Doped Amorphous-Si Using The Seeding Method (Seeding Method를 이용한 인이 도우핑된 Amorphous-Si에서의 HSG형성 조건)

  • 정양희;강성준
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.6
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    • pp.1128-1135
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    • 2001
  • In this paper, a new HSG-Si formation technology, "seeding method', which employs Si$_2$H$_{6}$-molecule irradiation and annealing, was applied for realizing 64Mbit DRAMs. By using this technique, grain size controlled HSG-Si can be fabricated on in-situ phosphorous-doped amorphous-Si electrode. The new HSG-Si fabrication technology achieves twice the storage capacitance with high reliability for the stacked capacitors. In this technique, optimum process conditions of the phosphorous concentration, storage polysilicon deposition temperature and thickness of hemispherical grain silicon are in the range of 3.0-4.0E19atoms/㎤, 53$0^{\circ}C$ and 400$\AA$, respectively. In the 64M bit DRAM capacitor using optimum process conditions, limit thickness of dielectric nitride is about 65$\AA$.

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Influence of Nitrogen Plasma Treatment on Low Temperature Deposited Silicon Nitride Thin Film for Flexible Display (플렉서블 디스플레이 적용을 위한 저온 실리콘 질화막의 N2 플라즈마 처리 영향)

  • Kim, Seongjong;Kim, Moonkeun;Kwon, Kwang-Ho;Kim, Jong-Kwan
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.27 no.1
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    • pp.39-44
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    • 2014
  • Silicon nitride thin film deposited with Plasma Enhanced Chemical Vapor Deposition was treated by a nitrogen plasma generated by Inductively Coupled Plasma at room temperature. The treatment was investigated by Fourier Transform Infrared Spectroscopy and Atomic Force Microscopy on the surface at various RF source powers at two RF bias powers. The amount of hydrogen was reduced and the surface roughness of the films was decreased remarkably after the plasma treatment. In order to understand the causes, we analyzed the plasma diagnostics by Optical Emission Spectroscopy and Double Langmuir Probe. Based on these analysis results, we show that the nitrogen plasma treatment was effective in the improving of the properties silicon nitride thin film for flexible display.

A Stacked Polusilicon Structure by Nitridation in N2 Atmosphere for Nano-scale CMOSFETs (나노 CMOS 소자 적용을 위한 질소 분위기에서 형성된 질화막을 이용한 폴리실리콘 적층 구조)

  • Ho, Won-Joon;Lee, Hi-Deok
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.11
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    • pp.1001-1006
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    • 2005
  • A new fabrication method is proposed to form the stacked polysilicon gate by nitridation in $N_2$ atmosphere using conventional LP-CVD system. Two step stacked layers with an amorphous layer on top of a polycrystalline layer as well as three step stacked layers with polycrystalline films were fabricated using the proposed method. SIMS profile showed that the proposed method would successfully create the nitrogen-rich layers between the stacked polysilicon layers, thus resulting in effective retardation of dopant diffusion. It was observed that the dopants in stacked films were piled-up at the interface. TEM image also showed clear distinction of stacked layers, their plane grain size and grain mismatch at interface layers. Therefore, the number of stacked polysilicon layers with different crystalline structures, interface position and crystal phase can be easily controlled to improve the device performance and reliability without any negative effects in nano-scale CMOSFETs.

The Technology of Sloped Wall SWAMI for VLSI and Analysis of Leakage Current (고집적 회로를 위한 경사면 SWAMI 기술과 누설전류 분석)

  • 이용재
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.15 no.3
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    • pp.252-259
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    • 1990
  • This paper present new scheme for a Side Wall Masked Isolation(SWAMI) technology which take all the advatages provided by conventional LOCOS process. A new SWAMI process incorporates a sloped sidewall by reactive ion etch and a layer of thin nitride around the side walls such that both intrinsic nitride stress and volume expansion induced stress are greatly reduced. As a fabricate results, a defect-free fully recessed zero bird's beak local oxidation process can be realized by the sloped wall anisotropic oxide isolation. No additional masking step is required. The leakage current of PN diodes of this process were reduced than PN diode of conventional LOCOS process. On the other hand, the edge junction part was larger than the flat juction part in the density of leakage current.

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PECVD Silicon Nitride Film Deposition and Annealing Optimization for Solar Cell Application (태양전지 응용을 위한 PECVD 실리콘 질화막 증착 및 열처리 최적화)

  • Yoo, Jin-Su;Dhungel Suresh Kumar;Yi, Jun-Sin
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.12
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    • pp.565-569
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    • 2006
  • Plasma enhanced chemical vapor deposition(PECVD) is a well established technique for the deposition of hydrogenated film of silicon nitride (SiNx:H), which is commonly used as an antireflection coating as well as passivating layer in crystalline silicon solar cell. PECVD-SiNx:H films were investigated by varying the deposition and annealing conditions to optimize for the application in silicon solar cells. By varying the gas ratio (ammonia to silane), the silicon nitride films of refractive indices 1.85 - 2.45 were obtained. The film deposited at $450^{\circ}C$ showed the best carrier lifetime through the film deposition rate was not encouraging. The film deposited with the gas ratio of 0.57 showed the best carrier lifetime after annealing at a temperature of $800^{\circ}C$. The single crystalline silicon solar cells fabricated in conventional industrial production line applying the optimized film deposition and annealing conditions on large area substrate of size $125mm{\times}125mm$ (pseudo square) was found to have the conversion efficiencies as high as 17.05 %. Low cost and high efficiency silicon solar cells fabrication sequence has also been explained in this paper.

Analysis of Properties and Fabrication of $1000{\AA}$ silicon nitride MIM capacitor with High Breakdown Electric Field for InGaP/GaAs HBT Application (InGaP/GaAs HBT 적용을 위한 높은 절연강토의$1000{\AA}$ 실리콘 질화막 MIM capacitor제작과 특성 분석)

  • So, Soon-Jin;Oh, Doo-Suk;Sung, Ho-Kun;Song, Min-Jong;Park, Choon-Bae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07b
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    • pp.693-696
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    • 2004
  • For InGaP/GaAs HBT applications, we have developed characterized MIM capacitors with thin $1000{\AA}$ PECVD silicon nitride which were deposited with $SiH_4/NH_3$ gas mixing rate, working pressure, and RF power of PECVD at $300^{\circ}C$ and had the capacitance density of 600 pF/$mm^2$ with the breakdown electric fields of 3073 MV/cm. Three PECVD process parameters were designed to lower the refractive index and then lower the deposition rate of silicon nitride films for the high breakdown electric field. At the PECVD process condition of gas mixing rate (0.92), working pressure (1.3 Torr), RF power (53 W), the AFM Rms value of about $1000{\AA}$ silicon nitride on the bottom metal was the lowest of 0.662 nmand breakdown electric fields were the highest of about 73 MV/cm.

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