• Journal of Sensor Science and Technology
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• v.1 no.2
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• pp.183-194
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• 1992

Some silicon micromechanical structures useful in sensors and actuators have been fabricated by electropolishing or porous silicon formation technique by anodic reaction in HF solution. The microstructures were lightly doped single crystal silicon and the formation was isotropic independent of crystal directions. Porous silicon layer(PSL) was formed selectively in $n^{+}$ region of $n^{+}/n$ silicon structure by anodic reaction in concentrated HF(20-48%) solution. Characteristics of the formed PSL were investigated along with change of the reaction voltage, HF concentration and the reaction time. PSL was formed only in $n^{+}$ region. The porosity of the PSL was decreased with the increase of HF concentration and independent of reaction voltage. For the case of $n/n^{+}/n$ structures, the etched surface of silicon was fairly smooth and a cusp was not found. The thickness of the microstructures was the same as that of the epitaxial n-Si layer and good uniformity. We have fabricated acceleration sensors by anodic reaction in HF solution(5 wt%) and planar technology. The process was compatible with conventional It fabrication technique. Various micromechanical structures, such as rotors of motor, gears and linear actuator, were also fabricated by the technique and examined by SEM photographs.

• Journal of rehabilitation welfare engineering & assistive technology
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• v.11 no.2
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• pp.133-141
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• 2017

The hybrid acoustic sensor for implantable hearing aid has the structure in which a sound pressure based acoustic sensor (ECM) and a vibration based acceleration sensor are combined. This sensor combines the low frequency sensitivity of an acoustic sensor with the high frequency sensitivity of an acceleration sensor, allowing the acquisition of a wide range of sound from low to high frequency. In this paper, an acceleration sensor for use in a hybrid acoustic sensor has been proposed. The acceleration sensor captures the vibration of the tympanic membrane generated by the acoustic signal. The size of the proposed acceleration sensor was determined to diameter of 3.2 mm considering the anatomical structure of the tympanic membrane and the standard of ECM. In order to make the hybrid acoustic sensor have high sensitivity and wide bandwidth characteristics, the aim of the resonance frequency of the acceleration sensor is to be generated at about 3.5 kHz. The membrane of the acceleration sensor derives geometric structure through mathematical model and finite element analysis. Based on the analysis results, the membrane was implemented through a chemical etching process. In order to verify the frequency characteristics of the implemented membrane, vibration measurement experiment using external force was performed. The experiment results showed mechanical resonance of the membrane occurred at 3.4 kHz. Therefore, it is considered that the proposed acceleration sensor can be utilized for a hybrid acoustic sensor.

• Clean Technology
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• v.14 no.2
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• pp.123-128
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• 2008

The waste solution, which was discharged from the recovery process of LCD etching solution, consists of 15 wt% nitric acid and 20 wt% acetic acid. In this study, it was conducted to separate acid individually from the mixed acid by vacuum evaporation under -760 mmHg gauge and at $40^{\circ}C$. We have investigated evaporation behavior of acid as a function of temperature. There have been problems that tiny amount of nitric acid were evaporated simultaneously above $33^{\circ}C$. Thus, efforts were conducted to recover acetic acid by vacuum evaporation with adding $H_2O$, waste mixed acid and 20 g/L NaOH for a curb on evaporation of nitric acid. By adding $H_2O$, evaporation of nitric acid was reduced from 7% to 0.78%. However, it was reduced from 7% to 0.25% by adding mixed acid. In view of the results achieved so far, we may expect to separate the etching solution individually by controlling vacuum conditions.

• The KIPS Transactions:PartD
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• v.11D no.3
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• pp.709-716
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• 2004

This paper describes an intelligent real-time monitoring system of a semiconductor processing equipment, which determines normal or not for a wafer in processing, using multiple time-series pattern recognition. The proposed system consists of three phases, initialization, learning and real-time prediction. The initialization phase sets the weights and tile effective steps for all parameters of a monitoring equipment. The learning phase clusters time series patterns, which are producted and fathered for processing wafers by the equipment, using LBG algorithm. Each pattern has an ACI which is measured by a tester at the end of a process The real-time prediction phase corresponds a time series entered by real-time with the clustered patterns using Dynamic Time Warping, and finds the best matched pattern. Then it calculates a predicted ACI from a combination of the ACI, the difference and the weights. Finally it determines Spec in or out for the wafer. The proposed system is tested on the data acquired from etching device. The results show that the error between the estimated ACI and the actual measurement ACI is remarkably reduced according to the number of learning increases.

• Journal of the Korean Chemical Society
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• v.48 no.6
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• pp.553-560
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• 2004

In this experiment, a three dimensional structure analysis was carried out to examine the surface defects of semiconductor made artificially on known scale. It was investigated the three dimensional imaging according to the sample depth and the thermal diffusivity as well as the carrier transport properties. The thermal diffusivity measurement of the intrinsic GaAs semiconductor was also analyzed by the difference of frequency-dependence photoacoustic signals from the sample surface of different conditions. Thermal properties such as thermal diffusion length or thermal diffusivity of the Si wafer with and without defects on the surface were obtained by interpreting the frequency dependence of the PA signals. As a result, the photoacoustic signal is found to have the dependency on the shape and depth of the defects so that their structure of the defects can be analyzed. This method demonstrates the possibility of the application to the detection of the defects, cracks, and shortage of circuits on surface or sub-surface of the semiconductors and ceramic materials as a nondestructive testing(NDT) and a nondestructive evaluation(NDE) technique.

• Korean Journal of Materials Research
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• v.10 no.4
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• pp.295-300
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• 2000

Uniform silicon tip arrays were fabricated using the reactive ion etching followed by the reoxidation sharpening, and the effect of Pd-coated layer on electron emission characteristics was studied. The electron emission from Si field emitter arrays(FEAs) was a little, but improved by removing surface oxide on the FEA, but pronounced drastically by coating a $100-{\AA}-thick$ Pd metal layer. The turn-on voltage in the Pd-coated Si FEAs was reduced by 30 V in comparison with that in uncoated ones. This results from the increase of surface roughness at the tip apex by the Pd coating on Si FEA, via the decrease of the apex radius at which electrons are emitting. The Pd-coated emitters showed superior operating stability over a wide current range to that of the uncoated ones. This suggests that Pd coating enhances the high temperature stability and the surface inertness Si FEA.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.188-188
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• 2000

DLC (Diamond-Like Carbon) 박막은 높은 경도와 가시광선 및 적외선 영역에서의 광 투과도, 전기적 절연성, 화학적 안정성 및 저마찰.내마모 특성 등의 우수한 물리.화학적인 물성을 갖고 있기 때문에 여러 분야의 응용연구가 이루어지고 있다. 이러한 DLC 박막을 제작하는 과정에는 여러 가지가 있으나, 본 연구에서는 ECR-PECVD electron cyclotron resonance plasma enhanced chemical vapor deposition) 방법을 사용하였다. 이것은 최근에 많이 이용되고 있는 방법으로, 이온화률이 높을뿐만 아니라 상온에서도 성막이 가능하고 넓은 진공도 영역에서 플라즈마 공정이 가능한 장점이 있다. 기판으로는 4" 크기의 S(100)를 사용하였고, 박막을 제작하기 전에 진공 중에서 플라즈마 전처리를 하였다. 플라즈마 전처리는 Ar 가스를 150SCCM 주입시켜 5$\times$10-1 torr 의 진공도를 유지시키면서, ECR power를 700W로 고정하고, 기판 bias 전압을 -300 V로 하여 5분 동안 기판을 청정하였다. DLC 박막은 ECR power를 700W. 가스혼합비와 유량을 CH4/H2 : 10/100 SCCM, 증착시간을 2시간으로 고정하고, 기판 bias 전압을 0, -50, -75, -100, -150, -200V로 변화시켜가면서 제작하였다. 이때 ECR 소스로부터 기판까지의 거리는 150mm로 하였고, 진공도는 2$\times$10-2torr 였으며, 기판 bias 전압은 기판에 13.56 MHz의 RF power를 연결하여 RF power에 의해서 유도되는 negative DC self bias 전압을 이용하였다. 제작된 박막을 Auger electron spectroscopy, elastic recoil detection, Rutherford backscattering spectroscopy, X-ray diffraction, secondary electron microscopy, atomic force microscoy, $\alpha$-step, Raman scattering spectroscopu, Fourier transform infrared spectroscopy 및 micro hardness tester를 이용하여 기판 bias 전압이 DLC 박막의 특성에 미치는 영향을 조사하였다. 분석결과 본 연구에서 제작된 DLC 박막은 탄소와 수소만으로 구성되어 있으며, 비정질 상태임을 알 수 있었다. 기판 bias 전압의 증가에 따라 박막의 두께가 감소됨을 알 수 있었고, -150V에서는 박막이 거의 만들어지지 않았으며, -200V에서는 기판 표면이 식각되었다. 이것은 기판 bias 전압과 ECR 플라즈마에 의한 이온충돌 효과 때문으로 판단되며, 150V 이하에서는 증착되는 양보다 re-sputtering 되는 양이 더 많을 것으로 생각된다. 기판 bias 전압을 증가시킬수록 플라즈마에 의한 이온충돌 현상이 두드러져 탄소와 결합하고 있던 수소원자들이 떨어져 나가는 탈수소화 (dehydrogenation) 현상을 확인할 수 있었으며, 이것은 C-H 결합에너지가 C-C 결합이나 C=C 결합보다 약하여 수소 원자가 비교적 해리가 잘되므로 이러한 현상이 일어난다고 판단된다. 결합이 끊어진 탄소 원자들은 다른 탄소원자들과 결합하여 3차원적 cross-link를 형성시켜 나가면서 내부 압축응력을 증가시키는 것으로 알려져 있으며, hardness 시험 결과로 이것을 확인할 수 있었다. 그리고 표면거칠기는 기판 bias 전압을 증가시킬수록 더 smooth 해짐을 확인하였다.인하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.139-139
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• 2010

금속 실리사이드 나노입자는 열적 및 화학적 안정성이 뛰어나고, 절연막내에 일함수 차이에 따라 깊은 양자 우물구조가 형성되어 비휘발성 메모리 소자를 제작할 수 있다. 그러나 단일 $SiO_2$ 절연막을 사용하였을 경우 저장된 전하의 정보 저장능력 및 쓰기/지우기 시간을 향상시키는 데 물리적 두께에 따른 제한이 따른다. 본 연구에서는 터널장벽 엔지니어링을 통하여 물리적인 두께는 단일 $SiO_2$ 보다는 두꺼우나 쓰기/지우기 동작을 위하여 인가되는 전기장에 의하여 상대적으로 전자가 느끼는 상대적인 터널 절연막 두께를 감소시키는 방법으로 동작속도를 향상 시킨 $SiO_2/Si_3N_4/SiO_2$ 및 $Si_3N_4/SiO_2/Si_3N_4$ 터널 절연막을 사용한 금속 실리사이드 나노입자 비휘발성 메모리를 제조하였다. 제조방법은 우선 p-type 실리콘 웨이퍼 위에 100 nm 두께로 증착된 Poly-Si 층을 형성 한 이후 소스와 드레인 영역을 리소그래피 방법으로 형성시켜 트랜지스터의 채널을 형성한 이후 그 상부에 $SiO_2/Si_3N_4/SiO_2$ (2 nm/ 2 nm/ 3 nm) 및 $Si_3N_4/SiO_2/Si_3N_4$ (2 nm/ 3 nm/ 3 nm)를 화학적 증기 증착(chemical vapor deposition)방법으로 형성 시킨 이후, direct current magnetron sputtering 방법을 이용하여 2~5 nm 두께의 $WSi_2$ 및 $TiSi_2$ 박막을 증착하였으며, 나노입자 형성을 위하여 rapid thermal annealing(RTA) system을 이용하여 $800{\sim}1000^{\circ}C$에서 질소($N_2$) 분위기로 1~5분 동안 열처리를 하였다. 이후 radio frequency magnetron sputtering을 이용하여 $SiO_2$ control oxide layer를 30 nm로 증착한 후, RTA system을 이용하여 $900^{\circ}C$에서 30초 동안 $N_2$ 분위기에서 후 열처리를 하였다. 마지막으로 thermal evaporator system을 이용하여 Al 전극을 200 nm 증착한 이후 리소그래피와 식각 공정을 통하여 채널 폭/길이 $2{\sim}5{\mu}m$인 비휘발성 메모리 소자를 제작하였다. 제작된 비휘발성 메모리 소자는 HP 4156A semiconductor parameter analyzer와 Agilent 81101A pulse generator를 이용하여 전기적 특성을 확인 하였으며, 측정 온도를 $25^{\circ}C$, $85^{\circ}C$, $125^{\circ}C$로 변화시켜가며 제작된 비휘발성 메모리 소자의 열적 안정성에 관하여 연구하였다.

• Korean Journal of Materials Research
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• v.19 no.1
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• pp.28-32
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• 2009

Silicon carbide (SiC) is a promising material for power device applications due to its wide band gap (3.26 eV for 4H-SiC), high critical electric field and excellent thermal conductivity. The Schottky barrier diode is the representative high-power device that is currently available commercially. A field plate edge-terminated 4H-SiC was fabricated using a lift-off process for opening the Schottky contacts. In this case, Ni/Ti dual-metal contacts were unintentionally formed at the edge of the Schottky contacts and resulted in the degradation of the electrical properties of the diodes. The breakdown voltage and Schottky barrier height (SBH, ${\Phi}_B$) was 107 V and 0.67 eV, respectively. To form homogeneous single-metal Ni/4H-SiC Schottky contacts, a deposition and etching method was employed, and the electrical properties of the diodes were improved. The modified SBDs showed enhanced electrical properties, as witnessed by a breakdown voltage of 635 V, a Schottky barrier height of ${\Phi}_B$=1.48 eV, an ideality factor of n=1.04 (close to one), a forward voltage drop of $V_F$=1.6 V, a specific on resistance of $R_{on}=2.1m{\Omega}-cm^2$ and a power loss of $P_L=79.6Wcm^{-2}$.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.32 no.1
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• pp.1-6
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• 2022

In this research, a ring-shaped silicon carbide (SiC) single crystal manufactured using the PVT (Physical Vapor Transport) method was proposed to be applied to a SiC focus ring in semiconductor etching equipment. A cylindrical graphite structure was placed inside the graphite crucible to grow a ring-shaped SiC single crystal by the PVT method. SiC single crystal ring without crack was successfully obtained in case of using SiC single crystal wafer as a seed. A plasma etching process was performed to compare plasma resistance between the CVD-SiC focus ring and the PVT-SiC focus ring. The etch rate of ring materials in PVT-single crystal SiC focus ring was definitely lower than that of CVD-SiC focus ring, indicating better plasma resistance of PVT-SiC focus ring.