• Title/Summary/Keyword: 순방향 전압

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Calculation of Forward Voltage Drop of IGBTs (IGBT 순방향 전압강하의 계산)

  • Choe, Byeong-Seong;Jeong, Sang-Gu
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.3
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    • pp.161-164
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    • 2000
  • A simple methode for calculating the forward voltage drop of IGBTs is presented, on the voltage drops on the p+ body, the reverse biased depletion region between p+body and epi-layer, the epi layer, and the forward biased collector junction. The decrease of the total current density in the epi layer near the p+ body is taken into account. The proposed methode allows a simple but accurate determination of the forward voltage drop in IGBTs, avoiding the complex path taken in the previous model for the forward voltage drops on channel, accumulation region, and epi region. Numerical simulations for 1kV NPT-IGBT with a uniformly doped collector are shown to support the analytical results.

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A Study on the Effective Barrier Height Reduction of Pt-nSi Schottky Contact (Pt-nSi쇼트키 접촉의 유효 장벽높이 감소에 관한 연구)

  • 박훈수;김봉열
    • Electrical & Electronic Materials
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    • v.2 no.1
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    • pp.33-40
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    • 1989
  • 낮은 에너지(60KeV) 비소 이온주입으로 고종도의 얇은 표면층을 형성시켜 Pt-nSi 쇼트키 다이오드의 유효 장벽높이를 감소시켰다. 역방향 특성을 크게 저하시키지 않고 순방향 임계전압을 400mV에서 200mV로 낮추는데 필요한 이온주입량은 얇은 산화막(215.angs.)이 존재하는 상태에서 비소 이온주입을 한 경우는 9.0*$10^{12}$$cm^{-2}$이고, 산화막이 없는 상태에서 이온주입한 경우는 5.1*$10^{12}$$cm^{-2}$이었다. 이온주입후 열처리 조건은 900.deg.C에서 30분간 N$_{2}$분위기에서 행하였으며 얇은 산화막을 통한 이온주입으로 다이오드의 역방향 특성을 개선하였다.

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A Numerical Analysis of the Heat Flow Equation using the Finite Element Method (유한요소법을 이용한 열흐름 방정식의 수치해석)

  • 이은구;김태한;김철성;강성수;이동렬
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.161-164
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    • 2001
  • 정상상태에서 소자 내부의 격자온도 분포를 해석할 수 있는 시뮬레이터를 제작하였다. Slotboom 변수를 사용하여 열흐름 방정식을 이산화하였다. 또한 격자온도 분포를 고려한 초기 해의 설정 방법을 제안하였다. 제안된 방법의 타당성을 검증하기 위하여 N/sup + P 정합 다이오드에 대해 모의실험을 수행하여 MEDICI의 결과와 비교하였다 순방향 전압-전류 특성은 MEDICI의 결과와 비교하여 7% 이내의 최대 상대오차를 보였고 전위 분포와 온도 분포는 각각 2%, 2% 이내의 최대 상대오차를 보였다. BANDIS에서는 수렴을 위해 평균 3.7회 이하의 행렬 연산이 필요하였으며, MEDICI에서는 평균 5.1회 이하의 행렬 연산이 필요하였다.

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Fabrication of PT type high power diode by proton irradiation (양성자 주입법에 의한 PT형 고속전력 다이오드의 제조)

  • Bae, Young-Ho;Kim, Byoung-Gil;Lee, Jong-Hun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.97-98
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    • 2005
  • 양성자 조사법에 의하여 고속 전력용 다이오드를 제작하기 위하여 punch-through 다이오드에 다양한 조건으로 양성자를 조사하였다. 동일한 소자에 전자선을 조사한 소자와 속도 향상을 위한 공정이 행하여지지 않은 동일한 소자 각각의 특성을 비교 분석하였다. 양성자 주입은 주입 에너지를 1 MeV 와 1.3 MeV로, 각 에너지 조건에서 도즈를 $1\times10^{12}cm^{-2}$, $1\times10^{13}cm^{-2}$로 변화 시켰다. 분석 결과 양성자 주입된 소자에서 역방향 회복시간은 최소 소자의 약 45%, 전자선이 조사된 소자에 비하여 약 73 %의 값으로 향상시킬 수 있었으며 역방향 항복 전압과 순방향 저항은 처리되지 않은 소자와 전자빔이 조사된 시편들의 값과 비슷한 값을 나타내었다.

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Analysis of AIGaAs/GaAs Depleted Optical Thyristor using bottom mirror (하부 거울층을 이용한 AIGaAs/GaAs 완전 공핍 광 싸이리스터 특성 분석)

  • Choi Woon-Kyiug;Kim Doo-Gun;Choi Young-Wan
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.1
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    • pp.39-46
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    • 2005
  • We fabricate and analyze fully depleted optical thyristors (DOTs) using quarter wavelength reflector stacks (QWRS). QWRS are employed as bottom mirrors to enhance the emission efficiency as well as the optical sensitivity. In order to analyze their switching characteristics, S-shape nonlinear current-voltage curves are simulated and the reverse full-depletion voltages (Vneg's) of DOTs are obtained as function of semiconductor parameters by using a finite difference method (FDM). The fabricated DOTs show sufficient nonlinear s-shape I-V characteristics and switching voltage changes of these devices with and without bottom mirrors show 1.82 V and 1.52 V, respectively. Compared to a conventional DOT, this device with the bottom mirrors shows about 20% and 46% enhancement in switching voltage change and spontaneous emission efficiency, respectively.

An Automatic AC-DC Transfer Error Measurement System (교류-직류 변환오차 자동 측정시스템)

  • Kwon, Sung-Won;Cho, Y.M.;Kim, K.T.;Kang, J.H.;Park, Y.T.
    • Journal of Sensor Science and Technology
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    • v.7 no.6
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    • pp.401-408
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    • 1998
  • A dual-channel automatic ac-dc voltage transfer error measurement system in which the output voltages of two thermal voltage converters which are ac voltage standard are directly measured at the same time to reduce the output voltage drift is described. Forward-reverse measurement method by using a two-channel scanner is used to cancel the offset voltage of the voltmeters. The agreements of the 4-V TVC comparison results between other national standards institute and Korea Research Institute of Standards and Science were less than about ${\pm}2\;ppm$ in the frequency range of $40\;Hz{\sim}100\;kHz$, and were less than about ${\pm}4\;ppm$ at $200\;kHz{\sim}1\;MHz$. Measurement uncertainty is reduced significantly from ${\pm}4\;ppm$ of manual system to ${\pm}3\;ppm$ of new system(up to 100 kHz) typically and great increase in comparison efficiency has been achieved by this system.

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Electrical Characteristics Analysis of Resistive Memory using Oxygen Vacancy in V2O5 Thin Film (산소공공을 이용한 V2O5 저항성 메모리의 전기적인 동작특성 해석)

  • Oh, Teresa
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.10
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    • pp.1827-1832
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    • 2017
  • To observe the characteristics to be a resistive memory of $V_2O_5$ deposited by oxygen various gas flows and annealed, the hysteresis curves of $V_2O_5$ were analyzed. The good resistive memory was obtained from the electrical characteristics of $V_2O_5$ films with the Schottky contact as a result of electron-hole pair, and the oxygen vacancy generated from the annealing process contributes the high quality of Schottky contact and the formation of resistive memories. The balanced Schottky contacts owing to the oxygen vacancy effect as the result of an ionic reaction were formed at the $V_2O_5$ film annealed at $150^{\circ}C$ and $200^{\circ}C$ and the balanced Schottky contact with negative to positive voltages enhanced the electrical operation with write/erase states according to the forward or reverse bias voltages for the resistive memory behavior due to the oxygen vacancy.

An Implementation of Temperature Independent Bias Scheme in Voltage Detector (온도에 무관한 전압검출기의 바이어스 구현)

  • Moon, Jong-Kyu;Kim, Duk-Gyoo
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.39 no.6
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    • pp.34-42
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    • 2002
  • In this paper, we propose a temperature independent the detective voltage source in voltage detector. The value of a detective voltage source is designed to become m times of silicon bandgap voltage at zero absolute temperature. By properly choosing the temperature coefficient of diode, the temperature coefficient of a concave voltage nonlinearities generated by the ${\Delta}V_{BE}$ section of diode between base and emitter of transistors with a different area can be summed with convex nonlinearities the $V_{BE}$ voltage to achieve the near zero temperature coefficient of the detective voltage source. We designed that the value of a detective voltage can be varied by ${\Delta}V_{BE}$, the $V_{BE}$multiplier circuit and resistor. In order to verify the performance of a proposed detective voltage source, we manufactured the voltage detector IC for 1.9V which is fabricated in $6{\mu}m$ Bipolar technology and measured the operating characteristics, the temperature coefficient of a detective voltage. To reduce the deviation of a detective voltage in the IC process step, we introduced a trimming technology, ion implantation and an isotropic etching. In manufactured IC, the detective voltage source could achieve the stable temperature coefficient of 29ppm/$^{\circ}C$ over the temperature range of -30$^{\circ}C$ to 70$^{\circ}C$. The current consumption of a voltage detector constituted by the proposed detective voltage source is $10{\mu}A$ from 1.9V-supply voltage at room temperature.

A discretization method of the three dimensional heat flow equation with excellent convergence characteristics (우수한 수렴특성을 갖는 3차원 열흐름 방정식의 이산화 방법)

  • Lee, Eun-Gu;Yun, Hyun-Min;Kim, Cheol-Seong
    • Journal of IKEEE
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    • v.6 no.2 s.11
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    • pp.136-145
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    • 2002
  • The simulator for the analysis of the lattice temperature under the steady-state condition is developed. The heat flow equation using the Slotboom variables is discretized and the integration method of the thermal conductivity without using the numerical analysis method is presented. The simulations are executed on the $N^+P$ junction diode and BJT to verify the proposed method. The average relative error of the lattice temperature of $N^+P$ diode compared with DAVINCI is 2% when 1.4[V] forward bias is applied and the average relative error of the lattice temperature of BJT compared with MEDICI is 3% when 5.0[V] is applied to the collector contact and 0.5[V] is applied to the base contact. BANDIS using the proposed method of integration of thermal conductivity needs 3.45 times of matrix solution to solve one bias step and DAVINCI needs 5.1 times of matrix solution MEDICI needs 4.3 times of matrix solution.

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A study on the amorphous s-i-n photodiode integrated with CMO IC (CMOS IC와 집적 가능한 비정질 p-i-n 광 수신기 제작에 관한 연구)

  • Kwak, Chol-Ho;Yoo, Hoi-Jun;Jang, Jin;Moon, Byoung-Yeon
    • Korean Journal of Optics and Photonics
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    • v.8 no.6
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    • pp.500-505
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    • 1997
  • Experimental amorphous photodiode is fabricated on CMOS IC using a-Si:H p-i-n structure. Amorphous photodiode is scuccessfully integrated on CMOS IC using amorphous Si produced by PECVD system. The PECVD system can deposit a-Si:H at low temperature so that photodiode can be integrated with CMOS IC structure without any process incompatibility. The fabricated amorphous photodiode has a breakdown voltage of below -20 V, a leakage current of about 1 $\mu\textrm{A}$, and turn-on voltage of 0.6~0.8 V. It is demonstrated that the photocurrent of optical signal can be turned on and off by a small voltage and the fabricated amorphous p-i-n photodiode can be used as an optical switch.

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