• Electronics and Telecommunications Trends
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• v.27 no.6
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• pp.124-133
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• 2012

최근 산업의 발전으로 대규모 문제 해결의 요구가 커지고 사용자가 원하는 서비스를 신속하게 받고자 고성능 컴퓨팅에 대한 요구가 계속해서 증가하고 있다. 이에 따라 멀티코어 및 매니코어와 이종 하드웨어의 혼용 등으로 지속해서 발전하는 새로운 고성능 컴퓨팅을 위한 시스템은 컴퓨팅 패러다임을 바꿀 시스템 소프트웨어의 혁신 요소로 등장하였다. 하드웨어를 활용하여 시스템의 성능을 높이기 위해서는 컴퓨팅 요소 간의 통신을 최소화하여 전력 소모를 줄이고, 메모리 계층 구조 및 지역성을 고려하여 성능을 높이는 것이 필요하다. 특히, 응용의 실행 시에 시스템 자원을 최고로 활용할 수 있게 하여 성능을 높이는 런타임 시스템은 하드웨어 및 운영체제를 변경하지 않고 시스템 자원을 최대한 활용하여 성능 최적화를 이룰 수 있는 기술이다. 따라서 본고에서는 런타임 시스템의 기능과 기술 방향을 파악하여 차세대 런타임 시스템에 필요한 기술 및 연구 분야를 전망하고자 한다.

• Proceedings of the Korea Information Processing Society Conference
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• 2014.11a
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• pp.22-23
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• 2014

멀티미디어 응용을 비롯한 스트리밍 응용들에서는 메모리와 CPU 사이의 데이터 전송이 상당한 비율의 에너지 소모를 차지한다. 데이터 재사용 분석은 이러한 응용 프로그램 에서 빈번히 사용되는 데이터를 고속의 저전력 메모리에 복사하도록 하여 에너지 소비를 줄일 수 있는 기회를 제공한다. 본 연구에서는 데이터의 재사용 분석을 통하여 프로그램이 최적화되도록 자동화된 기법을 제안하고 있다. 제안하는 기법을 사용할 경우 메인 메모리만 사용하는 경우에 비하여 절반 정도의 에너지 소비를 줄일 수 있다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.6
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• pp.1218-1224
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• 2017

With the increasing risk in building liquefied natural gas carriers (LNGC), pre-simulation of various scenarios is required for system integration and safe operation. In particular, the power management system (PMS) is an important part of the LNGC; it works in tight integration with the power control systems to achieve the desired performance and safety. To verify and improve unpredicted errors, we implemented a simulation model of power generation and consumption for testing PMS based on software-in-the-loop (SIL) method. To control and verify the PMS, numeric and physical simulation modeling was undertaken utilizing MATLAB/Simulink. In addition, the simulation model was verified with a load sharing test scenario for a sea trial. This simulation allows shipbuilders to participate in new value-added markets such as commissioning, installation, operation, and maintenance.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.21 no.3
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• pp.27-35
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• 2011

Design of Sensor nodes in Wireless Sensor Network(WSN) should be considered some properties as electricity consumption, transmission speed, range, etc., and also be needed the protection against various attacks (e.g., eavesdropping, hacking, leakage of customer's secret data, and denial of services). The stream cipher Rabbit, selected for the final eSTREAM portfolio organized by EU ECRYPT and selected as algorithm in part of ISO/IEC 18033-4 Stream Ciphers on ISO Security Standardization recently, is a high speed stream cipher suitable for WSN. Since the stream cipher Rabbit was evaluated the complexity of side-channel analysis attack as 'Medium' in a theoretical approach, thus the method of power analysis attack to the stream cipher Rabbit and the verification of our method by practical experiments were described in this paper. We implemented the stream cipher Rabbit without countermeasures of power analysis attack on IEEE 802.15.4/ZigBee board with 8-bit RISC AVR microprocessor ATmega128L chip, and performed the experiments of power analysis based on difference of means and template using a Hamming weight model.

• Journal of the Korea Computer Graphics Society
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• v.17 no.2
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• pp.37-43
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• 2011

OpenVG and SVG Tiny are the most widely used 2D vector graphics technologies for outputs in the various embedded environments including smart phones. Especially, to show high refresh rates on the high resolution screens, it is necessary to effectively accelerate them. Until now, OpenVG and SVG Tiny are available as hardware implementations such as the fully-dedicated graphics chips or full software implementations. Currently available vector graphics silicon chips are relatively expensive and require high power consumption. In contrast, previous full software implementations show lower performance even with almost 100% CPU usages, which would disrupt other multi-threaded applications, In this paper, we present a cost-effective way of accelerating both of OpenVG and SVG Tiny, based on the multimedia-processing hardware, which is wide-spread on the media devices and mobile phones. Through the effective use of these multimedia processors, we successfully accelerated OpenVG and SVG Tiny at least 3.5 times to at most 30 times, even with lower power consumption and lower CPU usage.

• KIPS Transactions on Computer and Communication Systems
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• v.2 no.5
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• pp.203-208
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• 2013

As smartphones are rapidly and widely spread, their applications request gradually larger computation power. Recently, in the personal computer, computing power of hardware has exceeded performance requirement of software sometimes. Computing power of smartphone, however, will not grow at the same pace as demand of applications because of form factor to seek thinner devices and power limitation by relatively slow technical progress of battery. Computation offloading is getting huge attention as one of solution for the problem. It has not commonly used technology in spite of advantages for performance and power consumption since the existing offloading frameworks are difficult for application developer to utilize. This paper presents an application developer-friendly offloading framework, named SorMob. Based on Aspect Oriented Programming model, SorMob provides a convenient environment for application development, and its performance was verified by comparing with the existing offloading framework.

• Journal of Digital Contents Society
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• v.15 no.4
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• pp.481-489
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• 2014

In this paper, the automatic standby power blocking socket outlet to reduce standby power by blocking power threshold is implemented. Where, the standby power means a flowing power when a disused power electronic is plugged into the socket outlet. The proposed socket outlet can cut off the standby power by establishing a proper block power threshold electronic device according to each electronic device because it can monitor the amount of power through the smart machines such as the real-time PC or mobile phone and directly control the blocking power threshold. The software is implemented by using Visual Studio software, code vision and SN8 C studio, and the hardware is embodied in ATmega128, SN8F27E93S, USB to UART, and relay etc. Through the simulation, we find that the standby power of the proposed method is similar to that of the conventional method in case of the cellular phone but the standby power of the proposed method is much less than that of the conventional method in case of the computer, air conditioning, and set-top box. Therefore, it is proved that the proposed socket outlet has a superior performance in terms of the standby power.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.11
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• pp.1094-1103
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• 2014

In this paper, we survey the works related to the system architecture of avionics and extract characteristics from the related works. On the basis of the investigation, we propose an integrated modular avionics (IMA) architecture that can be used for current avionic upgrades and future avionic developments based on the IMA Core system. To verify the feasibility of the proposed IMA architecture, we have developed the prototype of the IMA Core system that consists of both the common hardware module and the IMA software. It was verified that the developed prototype with the common hardware module contributes to the improvement of maintainability because it can save the time and expenses for the development and can reduce the number of types of hardware modules when compared with Federated architecture. It was also confirmed that the developed prototype can save not only overall system weight, size, and power consumption but also the number of hardware types because the IMA software can support the integrated processing where the single processing hardware module can process multiple software applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.31-40
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• 2005

The Multi-Threshold CMOS (MTCMOS) technology provides a solution to the high performance and low power design requirements of mobile computing applications. In this paper, we (i) motivate the post-mask-tooling performance enhancement technique combined with the MTCMOS leakage current suppression technology, and (ii) develop a practical MTCMOS ASIC design methodology which fine-tunes and integrates best-in-class techniques and commercially available tools to fix the new design issues related to the MTCMOS technology. Towards validating the proposed techniques, a Personal Digital Assistant (PDA) processor has been implemented using the methodology, and a 0.18um Process. The fabricated PDA processor operates at 333MHz which has been improved about $23\%$ at no additional cost of redesign and masks, and consumes about 2uW of standby mode leakage power which could have been three orders of magnitude larger if the MTCMOS technology was not applied.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.12
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• pp.167-173
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• 2015

This paper presents a study on the Full-HD HEVC(High Efficiency Video Coding) encoder IP(Intellectual Property) design. The designed IP is for HEVC main profile 4.1, and performs encoding with a speed of 60 fps of full high definition. Before hardware and software design, overall reference model was developed with C language, and we proposed a parallel processing architecture for low-power consumption. And also we coded firmware and driver programs relating IP. The platform for verification of developed IP was developed, and we verified function and performance for various pictures under several encoding conditions by implementing designed IP to FPGA board. Compared to HM-13.0, about 35% decrease in bit-rate under same PSNR was achieved, and about 25% decrease in power consumption under low-power mode was performed.