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http://dx.doi.org/10.5573/ieie.2015.52.12.167

A Study on the Full-HD HEVC Encoder IP Design  

Lee, Sukho (SoC Research Department, Electronics and Telecommunications Research Institute)
Cho, Seunghyun (SoC Research Department, Electronics and Telecommunications Research Institute)
Kim, Hyunmi (SoC Research Department, Electronics and Telecommunications Research Institute)
Lee, Jehyun (School of Electrical and Communication Engineering, Dongyang Mirae University)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.52, no.12, 2015 , pp. 167-173 More about this Journal
Abstract
This paper presents a study on the Full-HD HEVC(High Efficiency Video Coding) encoder IP(Intellectual Property) design. The designed IP is for HEVC main profile 4.1, and performs encoding with a speed of 60 fps of full high definition. Before hardware and software design, overall reference model was developed with C language, and we proposed a parallel processing architecture for low-power consumption. And also we coded firmware and driver programs relating IP. The platform for verification of developed IP was developed, and we verified function and performance for various pictures under several encoding conditions by implementing designed IP to FPGA board. Compared to HM-13.0, about 35% decrease in bit-rate under same PSNR was achieved, and about 25% decrease in power consumption under low-power mode was performed.
Keywords
Full-HD; HEVC; IP; CODEC; Encoder; Decoder;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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