• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.747-749
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• 2012

This paper is analyzing the SoC policy of major nations as the U.S, Japan, Europe, Taiwan, China and draw the suggestions for the development of semiconductor industry in Korea. SoC is the non-memory semiconductor to support and put into action the function of system. SoC is big market over the 200billion dollars and have a huge potential for new IT convergence market. Developed countries as the US, Japan, and Europe have enforced the industrial competitiveness by company investment and Taiwan supported the SoC Industry by government fund. Korea is No.1 superpower in DRAM semiconductor, but very weak in SoC Industry. We should secure the competitiveness of SoC Industry by the development of core technology, planning the growth policy, and building the cooperative model to leap the SoC power nation.

• Journal of Advanced Navigation Technology
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• v.17 no.5
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• pp.560-567
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• 2013

In this paper, it is proposed the fault detection method of the ASIC, without the Test Requirement Document(TRD), extracting internal logic circuit and analyzed the function of the ASIC using the multipurpose development program and simulation. If there don't have the TRD, it is impossible to analyze the operation of the circuit and find out the fault detection in any chip. Therefore, we make the TRD based on the analyzed logic data of the ASIC, and diagnose of the ASIC circuit at the gate level through the signal control of I/O pins using the Dynamic Pattern signal. According to the experimental results of the proposed method, we is confirmed the good performance of the fault detection capabilities which applied to the non-memory circuit.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.05a
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• pp.845-848
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• 2009

Power semiconductor devices are semiconductor devices used as switches or rectifiers in power electronics circuits. Theyare also caleed power devices or when used in integrated circuits, called power ICs. Some common power devices are the power diode, thyristor, power MOSFET and IGBT (insulated gate bipolar transistor). A power diode or MOSFET operates on similar principles to its low-power counterpart, but is able to carry a larger amount of current and typically is able to support a larger reverse-bias voltage in the off-state. Structural changes are often made in power devices to accommodate the higher current density, higher power dissipation and/or higher reverse breakdown voltage. The vast majority of the discrete (i.e non integrated) power devices are built using a vertical structure, whereas small-signal devices employ a lateral structure. With the vertical structure, the current rating of the device is proportional to its area, and the voltage blocking capability is achieved in the height of the die. With this structure, one of the connections of the device is located on the bottom of the semiconductor.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.7 no.2
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• pp.93-106
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• 1997

Summation generator is a real adder generator with maximum period, near maximum linear complexity and maximum order of correlation immunity. But this generator has been analyzed by a correlation attack(a kind of known-plaintext attack), which confers carry bits from output sequences of consecutive 0's or 1's. As methods of immunizing carry-output correlation, an immunized summation generator which exclusively-ORed summation generator output with output of a stage of LFSR was proposed. But the immunized generator reuses the output of LFSR by k-bit later and does not garantees maximum period in special case. In this paper we proposed an improved summation generator with 2-bit memory and analyzed it.

• Journal of the Korean Association of Geographic Information Studies
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• v.9 no.4
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• pp.12-21
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• 2006

Recently, Very large and high resolution geological data from aerial or satellite imagery are available. Many researches and applications require to do realtime visualization of interest geological area or entire planet. Important operation of wide-spreaded terrain realtime visualization technique is the appropriate model resolution selection from pre-processed multi-resolution model hierarchy depend upon participant's view. For embodying such realtime rendering system with large geometric data, Preprocessing multi-resolution hierarchy from large scale geological information of interest area is required. In this research, recent Cubic multiresolution 4-8 tile hierarchy is selected for global planetary applications. Based upon the tile hierarchy, It constructs the selective terminal level tile mesh for original geological information area and starts to sample individual generated tiles for terminal level tiles. It completes the hierarchy by constructing intermediate tiles with low pass filtering in bottom-up direction. This research embodies series of efficient cubic 4-8 tile hierarchy construction mechanism with out-of-core storage. The planetary scale Mars' geographical altitude data and image data were selected for the experiment.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.3
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• pp.41-47
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• 2020

The effect of Co interlayer on the interfacial reliability of SiN_x/Co/Cu thin film structure for advanced Cu interconnects was systematically evaluated by using a double cantilever beam test. The interfacial adhesion energy of the SiN_x/Cu thin film structure was 0.90 J/㎡. This value of the SiN_x/Co/Cu thin film structure increased to 9.59 J/㎡.Measured interfacial adhesion energy of SiN_x/Co/Cu structure was around 10 times higher than SiN_x/Cu structure due to CoSi₂ reaction layer formation at SiN_x/Co interface, which was confirmed by X-ray photoelectron spectroscopy analysis. The interfacial adhesion energy of SiN_x/Co/Cu structure decreased sharply after post-annealing at 200℃ for 24 h due to Co oxidation at SiN_x/Co interface. Therefore, it is required to control the CoO and Co₃O₄ formation during the environmental storage of the SiN_x/Co/Cu thin film to achieve interfacial reliability for advanced Cu interconnections.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.29 no.2D
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• pp.311-318
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• 2009

Interactive terrain visualization is an important research area with applications in GIS, games, virtual reality, scientific visualization and flight simulators, besides having military use. This is a complex and challenging problem considering that some applications require precise visualizations of huge data sets at real-time rates. In general, the size of data sets makes rendering at real-time difficult since the terrain data cannot fit entirely in memory. In this paper, we suggest the effective Real-time LOD(level-of-detail) algorithm for displaying the huge terrain data and processing mass geometry. We used a hierarchy structure with $4{\times}4$ and $2{\times}2$ tiles for real-time rendering of mass volume DEM which acquired from Digital map, LiDAR, DTM and DSM. Moreover, texture mapping is performed to visualize realistically while displaying height data of normalized Giga Byte level with user oriented terrain information and creating hill shade map using height data to hierarchy tile structure of file type. Large volume of terrain data was transformed to LOD data for real time visualization. This paper show the new LOD algorithm for seamless visualization, high quality, minimize the data loss and maximize the frame speed.