• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.27 no.9C
• /
• pp.861-870
• /
• 2002

In this paper, with targeting on the drawback of RSA of operation speed, a new 1024-bit RSA cryptosystem has been proposed and implemented in hardware to increase the operational speed and perform the variable-length encryption. The proposed cryptosystem mainly consists of the modular exponentiation part and the modular multiplication part. For the modular exponentiation, the RL-binary method, which performs squaring and modular multiplying in parallel, was improved, and then applied. And 4-stage CSA structure and radix-4 booth algorithm were applied to enhance the variable-length operation and reduce the number of partial product in modular multiplication arithmetic. The proposed RSA cryptosystem which can calculate at most 1024 bits at a tittle was mapped into the integrated circuit using the Hynix Phantom Cell Library for Hynix 0.35㎛ 2-Poly 4-Metal CMOS process. Also, the result of software implementation, which had been programmed prior to the hardware research, has been used to verify the operation of the hardware system. The size of the result from the hardware implementation was about 190k gate count and the operational clock frequency was 150㎒. By considering a variable-length of modulus number, the baud rate of the proposed scheme is one and half times faster than the previous works. Therefore, the proposed high speed variable-length RSA cryptosystem should be able to be used in various information security system which requires high speed operation.

• Journal of Digital Contents Society
• /
• v.19 no.6
• /
• pp.1213-1218
• /
• 2018

Recently introduced Mask R - CNN presents a conceptually simple, flexible, general framework for instance segmentation of objects. In this paper, we propose an algorithm for efficiently searching objects of images, while creating a segmentation mask of heat generation part for an instance which is a heating element in a heat sensed image acquired from a thermal infrared camera. This method called a mask R - CNN is an algorithm that extends Faster R - CNN by adding a branch for predicting an object mask in parallel with an existing branch for recognition of a bounding box. The mask R - CNN is added to the high - speed R - CNN which training is easy and fast to execute. Also, it is easy to generalize the mask R - CNN to other tasks. In this research, we propose an infrared image detection algorithm based on R - CNN and detect heating elements which can not be distinguished by RGB images. As a result of the experiment, a heat-generating object which can not be discriminated from Mask R-CNN was detected normally.

• Journal of the Korea Society of Computer and Information
• /
• v.25 no.1
• /
• pp.37-43
• /
• 2020

In this paper, we propose an efficient AB² multiplication algorithm using SPB(shifted polynomial basis) over finite fields. Using the feature of the SPB, we split the equation for AB² multiplication into two parts. The two partitioned equations are executable at the same time, and we derive an algorithm that processes them in parallel. Then we propose an efficient semi-systolic AB² multiplier based on the proposed algorithm. The proposed multiplier has less area-time (AT) complexity than related multipliers. In detail, the proposed AB² multiplier saves about 94%, 87%, 86% and 83% of the AT complexity of the multipliers of Wei, Wang-Guo, Kim-Lee, Choi-Lee, respectively. Therefore, the proposed multiplier is suitable for VLSI implementation and can be easily adopted as the basic building block for various applications.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.44 no.3 s.357
• /
• pp.35-42
• /
• 2007

The finite-field division can be applied to the elliptic curve cryptosystems. However, an efficient algorithm and the hardware design are required since the finite-field division takes much time to compute. In this paper, we propose a radix-4 systolic divider on $GF(2^m)$ with comparative area and performance. The algorithm of the proposed divide, is mathematically developed and new counter structure is proposed to map on low-cost systolic cells, so that the proposed systolic architecture is suitable for YLSI design. Compared to the bit-parallel, bit-serial and digit-serial dividers, the proposed divider has relatively effective high performance and low cost. We design and synthesis $GF(2^{193})$ finite-field divider using Dongbuanam $0.18{\mu}m$ standard cell library and the maximum clock frequency is 400MHz.

• Convergence Security Journal
• /
• v.22 no.2
• /
• pp.21-26
• /
• 2022

Wearing face masks is an effective measure to prevent COVID-19 infection. Infrared thermal image based temperature measurement and identity recognition system has been widely used in many large enterprises and universities in China, so it is totally necessary to research the face mask detection of thermal infrared imaging. Recently introduced MTCNN (Multi-task Cascaded Convolutional Networks)presents a conceptually simple, flexible, general framework for instance segmentation of objects. In this paper, we propose an algorithm for efficiently searching objects of images, while creating a segmentation of heat generation part for an instance which is a heating element in a heat sensed image acquired from a thermal infrared camera. This method called a mask MTCNN is an algorithm that extends MTCNN by adding a branch for predicting an object mask in parallel with an existing branch for recognition of a bounding box. It is easy to generalize the R-CNN to other tasks. In this paper, we proposed an infrared image detection algorithm based on R-CNN and detect heating elements which can not be distinguished by RGB images.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.38C no.2
• /
• pp.196-201
• /
• 2013

In this paper, we proposed high speed LDPC encoder architecture for DVB-S2 standard. In conventional algorithm, the processes of parity calculations are serial fashion. Therefore conventional algorithm need clocks of number of parity. The proposed LDPC encoding architecture is based on a parallel 360 bits-wise operations. The key issues for realizing high speed are using the two kinds of index addresses and make use of memories efficiently. We implemented a half rate LDPC encoder on an FPGA, and confirmed its maximum throughput is up to 10 Gbps on 100MHz clock.

• Journal of the Korea Society of Computer and Information
• /
• v.25 no.2
• /
• pp.41-48
• /
• 2020

In this paper, we derive a common computational part in an algorithm that can simultaneously perform multiplication and square over finite fields, and propose a low-area bit-parallel systolic array that reduces hardware through sequential processing. The proposed systolic array has less space and area-time (AT) complexity than the existing related arrays. In detail, the proposed systolic array saves about 48% and 44% of Choi-Lee and Kim-Kim's systolic arrays in terms of area complexity, and about 74% and 44% in AT complexity. Therefore, the proposed systolic array is suitable for VLSI implementation and can be applied as a basic component in hardware constrained environment such as IoT.

• Journal of KIISE:Software and Applications
• /
• v.34 no.12
• /
• pp.1045-1055
• /
• 2007

Latent topic models are statistical models which automatically captures salient patterns or correlation among features underlying a data collection in a probabilistic way. They are gaining an increased popularity as an effective tool in the application of automatic semantic feature extraction from text corpus, multimedia data analysis including image data, and bioinformatics. Among the important issues for the effectiveness in the application of latent topic models to the massive data set is the efficient learning of the model. The paper proposes an accelerated learning technique for PLSA model, one of the popular latent topic models, by an incremental EM algorithm instead of conventional EM algorithm. The incremental EM algorithm can be characterized by the employment of a series of partial E-steps that are performed on the corresponding subsets of the entire data collection, unlike in the conventional EM algorithm where one batch E-step is done for the whole data set. By the replacement of a single batch E-M step with a series of partial E-steps and M-steps, the inference result for the previous data subset can be directly reflected to the next inference process, which can enhance the learning speed for the entire data set. The algorithm is advantageous also in that it is guaranteed to converge to a local maximum solution and can be easily implemented just with slight modification of the existing algorithm based on the conventional EM. We present the basic application of the incremental EM algorithm to the learning of PLSA and empirically evaluate the acceleration performance with several possible data partitioning methods for the practical application. The experimental results on a real-world news data set show that the proposed approach can accomplish a meaningful enhancement of the convergence rate in the learning of latent topic model. Additionally, we present an interesting result which supports a possible synergistic effect of the combination of incremental EM algorithm with parallel computing.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.30 no.4C
• /
• pp.230-238
• /
• 2005

An orthogonal frequency division multiplexing (OFDM) system consists of a number of independently modulated subcarriers and, thus, a high peak-to-average power ratio (PAR) can occur when the subcarriers are added coherently. The high PAR brings such disadvantages as an increased complexity of the analog-to-digital (ADC) and digital-to-analog (DAC) converters and a reduced efficiency of the radio frequency (RF) power amplifier. In this paper, we propose a novel PAR reduction scheme called selective mapping of partial tones (SMOPT). The SMOPT scheme has a reduced complexity, lower sensitivity to peak reduction tones (PRT) positions, and a shorter processing time as compared with the conventional tone reservation (TR) scheme. The performance of the SMOPT scheme is analyzed based on the IEEE 802.1la wireless local area network(WLAM) physical layer model. Numerical results show that the SMOPT scheme outperforms the TR scheme under various scenarios.

• Journal of the Korean Institute of Intelligent Systems
• /
• v.24 no.4
• /
• pp.430-436
• /
• 2014

Matrix-star and Half-Pancake graphs are modified versions of Star graphs, and has some good characteristics such as node symmetry and fault tolerance. This paper analyzes embedding between Matrix-star and Half-Pancake graphs. As a result, Matrix-star graphs $MS_{2,n}$ can be embedded into Half-Pancake graphs $HP_{2n}$ with dilation 5 and expansion 1. Also, Half Pancake Graphs, $HP_{2n}$ can be embedded into Matrix Star Graphs, $MS_{2,n}$ with the expansion cost, O(n). This result shows that algorithms developed from Star Graphs can be applied at Half Pancake Graphs with additional constant cost because Star Graphs, $S_n$ is a part graph of Matrix Star Graphs, $MS_{2,n}$.