• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.3
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• pp.39-51
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• 2017

Recently, looking at construction sites with either large or small scale, accidents like collision, fall, etc. occur often. These accidents lead to not only damage of human lives but also serious economic loss. In case of large scale constructions sites, safety management systems are used to reduce industrial accidents. However in construction sites with small scale, those systems cannot be applied due to problems such as lack of compatability and high installation expense. In this case, just by putting on safety gears can also reduce industrial accidents. Therefore, in this paper, a safety management systems that can be used at both large and small scale construction sites is proposed. This safety management system consists of a smart module, a repeater and a gateway, and a monitoring system. The smart module, which is detachable, is attached to a safety helmet. This module transfers the current status of the user to the monitoring system through the repeater and the gateway. The repeater transfers the data received from the smart module to the gateway, and the gateway sends the data from the repeater to the monitoring system. The monitoring system shows the user status to the safety supervisor by displaying the data - temperature, height, intensity of illumination, images - received from the smart module. The safety supervisor can monitor the user status in real-time and take immediate action in case of emergency through this monitoring system.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.4
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• pp.79-86
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• 2016

Physical layer security is cryptography technique to protect information by using physical nature of signals. Currently, many works on physical layer security have been actively researching while those researching models still have some problems to be solved. Eavesdropper does not share its channel state information with legitimate users to hide its presence. And when node transmits signal, hardware impairments are occurred, whereas many current researches assume that node model is ideal node and does not consider hardware impairments. The main features and contributions of this paper to solve these problems are as follows. First, our proposed system model deploys torch node around legitimate user to obtain channel state information of eavesdropper and considers hardware impairments by using channel state information of torch node. Second, we derive closed-form expression of intercept probability for the proposed system model. The results of the performance evaluation through various simulations to find out the effects on proposed system model in physical layer security show that imperfect channel state information does not effect on intercept probability while imperfect node model effects on intercept probability, Ergodic secrecy capacity and secrecy capacity.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.12
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• pp.105-112
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• 2009

In this paper, we investigated abnormal ESD failure on guard-rings in the smart power IC fabricated with $0.35{\mu}m$ Bipolar-CMOS-DMOS (BCD) technology. Initially, ESD failure occurred below 200 V in the Machine Model (MM) test due to current crowding in the parasitic diode associated with the guard-rings which are generally adopted to prevent latch-up in high voltage devices. Optical Beam Induced Resistance Charge (OBIRCH) and Scanning Electronic Microscope (SEM) were used to find the failure spot and 3-D TCAD was used to verify cause of failure. According to the simulation results, excessive current flows at the comer of the guard-ring isolated by Local Oxidation of Silicon (LOCOS) in the ESD event. Eventually, the ESD failure occurs at that comer of the guard-ring. The modified comer design of the guard-ring is proposed to resolve such ESD failure. The test chips designed by the proposed modification passed MM test over 200 V. Analyzing the test chips statistically, ESD immunity was increased over 20 % in MM mode test. In order to avoid such ESD failure, the automatic method to check the weak point in the guard-ring is also proposed by modifying the Design Rule Check (DRC) used in BCD technology. This DRC was used to check other similar products and 24 errors were found. After correcting the errors, the measured ESD level fulfilled the general industry specification such as HBM 2000 V and MM 200V.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.47 no.1
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• pp.171-184
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• 2010

In this work, we develop a novel channel power allocation method for the real-time multimedia over the wireless network environment. Since each frame has different effect on the user perceivable QoS, improving packet loss does not necessarily coincide with perceivable improvements in QoS. A new channel power control scheme is suggested based on the quantified importance of each frame in terms of user perceivable QoS. Dynamic programming formulation is used to obtain optimal transmit power which minimizes power consumption and maximizes user perceivable QoS simultaneously. The experiment is performed by using publicly available video clips. The performance is evaluated using network simulator version 2 (NS 2) and decoding engine is embedded at the client node, and calculated PSNR over the every frame transmitted. Through the semantics aware power allocation (SAPA) scheme, significant improvement on the QoS has been verified, which is the result of unequal protection to more important packets. SAPA scheme reduced the loss of I frame by upto 27% and reduced power consumption by upto 19% without degradation on the user perceivable QoS.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.47 no.1
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• pp.15-21
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• 2010

This paper proposes the multimedia fingerprinting code insertion algorithm when video content is distributed in P2P environment, and designs the collusion codebook SRP(Small RISC Processor) embedded system for the collusion attack prevention. In the implemented system, it is detecting the fingerprinting code inserted in the video content of the client user in which it requests an upload to the web server and in which if it is certified content then transmitted to the streaming server then the implemented system allowed to distribute in P2P network. On the contrary, if it detects the collusion code, than the implemented system blocks to transmit the video content to the streaming server and discontinues to distribute in P2P network. And also it traces the colluders who generate the collusion code and participates in the collusion attack. The collusion code of the averaging attack is generated with 10% of BIBD code v. Based on the generated collusion code, the codebook is designed. As a result, when the insert quantity of the fingerprinting code is 0.15% upper in bitplane 0~3 of the Y(luminance) element of I-frame at the video compression of ASF for a streaming service and MP4 for an offline offer of video content, the correlation coefficient of the inserted original code and the detected code is above 0.15. At the correlation coefficient is above 0.1 then the detection ratio of the collusion code is 38%, and is above 0.2 then the trace ratio of the colluder is 20%.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.48 no.4
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• pp.107-115
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• 2011

In this paper, we proposed fast and efficient algorithm for detecting near-duplication based on content based retrieval in large scale video database. For handling large amounts of video easily, we split the video into small segment using scene change detection. In case of video services and copyright related business models, it is need to technology that detect near-duplicates, that longer matched video than to search video containing short part or a frame of original. To detect near-duplicate video, we proposed motion distribution and frame descriptor in a video segment. The motion distribution descriptor is constructed by obtaining motion vector from macro blocks during the video decoding process. When matching between descriptors, we use the motion distribution descriptor as filtering to improving matching speed. However, motion distribution has low discriminability. To improve discrimination, we decide to identification using frame descriptor extracted from selected representative frames within a scene segmentation. The proposed algorithm shows high success rate and low false alarm rate. In addition, the matching speed of this descriptor is very fast, we confirm this algorithm can be useful to practical application.

• The Journal of Engineering Geology
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• v.30 no.1
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• pp.71-84
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• 2020

Various geological structures are found on the slope of Bangnim district in Pyeongchang, Gangwon-do, based on the Paleozoic Joseon Supergroup Limestone. The recumbent fold observed on the slope is a very rare geological structure that has not been found in Korea, and has important academic value in exploring the formation process of the Paleozoic geological structures in the Gangwon region. In this study, discussed the geological value of the geological structure observed on the slope of the road, and studied the management method of rockfall problem slopes. The state of development of recumbent folds has conservation value in geological scarcity and specificity. Preservation management measures should be prepared through the protection of slopes and measures to reduce of rockfall risks as geoheritage with an important value in geology science and education. Furthermore, it is expected to be preserved and utilized as a geopark.

• Ecology and Resilient Infrastructure
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• v.7 no.3
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• pp.160-170
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• 2020

Railroads and roads are typical linear projects, and their networks are expanding nationwide. To minimize the impact of their development on the environment, ecological disconnection due to the parallel lines of railroads and roads is to be avoided as much as possible. In this study, to examine the environmental impact of railroad and road development, the characteristics of railroads and roads and the differences between them were examined through a comparative analysis of key evaluation items. Based on the result, the road development, unlike the railroad project, suggests items for establishing an efficient land use plan and soil protection as the key evaluation items. There are no specific evaluation items and criteria that can be used to examine the environmental impact of railroad lines located adjacent to roads. In this study, eight evaluation items were suggested by reviewing the relevant literature. In particular, in the strategic environmental impact assessment stage, which examines the adequacy and location feasibility of the plan, the minimum separation distance criteria were proposed to examine in advance the environmental impact of railroads located adjacent to the existing roads. The distances were examined for the previously operated routes, and a distance of less than 200 m was suggested to minimize the environmental impact. The results were compared with those in other studies and analyzed. The results of this study can be used as a basis for examining alternative routes that can minimize the environmental impact of adjacent railroads and roads.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.11
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• pp.21-30
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• 1998

In this paper, a digital current control system using a FPGA(Field Programmable Gate Array) was implemented, and the system was applied to an induction motor widely used as an industrial driving machine. The FPGA designed by VHDL(VHSIC Hardware Description Language) consists of a PWM(Pulse Width Modulation) generation block, a PWM protection block, a speed measuring block, a watch dog timer block, an interrupt control block, a decoder logic block, a wait control block and digital input and output blocks respectively. Dedicated clock inputs on the FPGA were used for high-speed execution, and an up-down counter and a latch block were designed in parallel, in order that the triangle wave could be operated at 40 MHz clock. When triangle wave is compared with many registers respectively, gate delay occurs from excessive fan-outs. To reduce the delay, two triangle wave registers were implemented in parallel. Amplitude and frequency of the triangle wave, and dead time of PWM could be changed by software. This FPGA was synthesized by pASIC 2SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to digital current control system for 3-phase induction motor. The digital current control system of the 3 phase induction motor was configured using the DSP(TMS320C31-40 MHz), FPGA, A/D converter and Hall CT etc., and experimental results showed the effectiveness of the digital current control system.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.12
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• pp.99-108
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• 2015

The embedded microcontroller which is operated by the logic gates synchronized on the clock pulse, is gradually used as main controller of mission-critical systems. Severe electrical situations such as high voltage/frequency surge may cause malfunctioning of the clock source. The tolerant system operation is required against the various external electric noise and means the robust design technique is becoming more important issue in system clock failure problems. In this paper, we propose on-chip backup clock change architecture for the automatic clock failure detection. For the this, we adopt the edge detector, noise canceller logic and glitch-free clock changer circuit. The implemented edge detector unit detects the abnormal low-frequency of the clock source and the delay chain circuit of the clock pulse by the noise canceller can cancel out the glitch clock. The externally invalid clock source by detecting the emergency status will be switched to back-up clock source by glitch-free clock changer circuit. The proposed circuits are evaluated by Verilog simulation and the fabricated IC is validated by using test equipment electrical field radiation noise