• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.1
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• pp.165-172
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• 2012

Integrated-optic asymmetric Mach-Zehnder interferometer at $1.3{\mu}m$ wavelength and segmented electrode structure were designed and fabricated as a sensing part for the electric-field measurement system. The device was simulated based on the BPM software and fabricated utilizing Ti-diffused $LiNbO_3$ channel optical waveguides and lumped-type electrodes. Almost half-maximum power transmission was observed for asymmetric interferometers with ${\pi}/2$ intrinsic phase difference. Expected experimental measurements were observed for 1KHz electrical signal bandwidth.

• Journal of the Korean Wood Science and Technology
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• v.16 no.2
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• pp.1-41
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• 1988

For the purpose of utilizing the sawdust having poor combining properties as board raw material and resulting in dimensional instability of board, polypropylene chip (abbreviated below as PP chip) or oriented PP thread was combined with sawdust particle from white meranti(Shorea sp.). The PP chip was prepared from PP thread in length of 0.25, 0.5, 1.0 and 1.5 cm for conventional blending application. Thereafter, the PP chip cut as above was combined with the sawdust particle by 3, 6, 9, 12 and 15% on the weight basis of board. Oriented PP threads were aligned with spacing of 0.5, 1.0 and 1.5cm along transverse direction of board. The physical and mechanical properties on one, two and three layer boards manufactured with the above combining conditions were investigated. The conclusions obtained at this study were summarized as follows: 1. In thickness swelling, all one layer boards combined with PP chips showed lower values than control sawdustboard, and gradually clear decreasing tendendy with the increase of PP chip composition. Two layer board showed higher swelling value than one layer board, but the majority of boards lower values than control sawdustboard. All three layer boards showed lower swelling values than control sawdustboard. 2. In the PP chip and oriented thread combining board, the swelling values of boards combining 0.5cm spacing oriented thread with 1.0 or 1.5cm long PP chip in 12 and 15% by board weight were much lower than the lowest of one or three layer. 3. In specific gravity of 0.51, modulus of rupture of one layer board combined with 3% PP chip showed higher value than control sawdustboard. However, moduli of rupture of the boards with every PP chip composition did not exceed 80kgf/cm2, the low limit value of type 100 board, Korean Industrial Standard KS F 3104 Particleboards. Moduli of rupture of 6%, 1.5cm-long and 3% PP chip combined boards in specific gravity of 0.63 as well as PP chip combined board in specific gravity of 0.72 exceeded 80kgf/$cm^2$ on KS F 3104. Two layer boards combined with every PI' chip composition showed lower values than control sawdustboard and one layer board. Three layer boards combined with.1.5cm long PP chip in 3, 6 and 9% combination level showed higher values than control sawdustboard, and exceeded 80kgf/$cm^2$ on KS F 3104. 4. In modulus of rupture of PP thread oriented sawdustboard, 0.5cm spacing oriented board showed the highest value, and 1.0 and 1.5cm spacing oriented boards lower values than the 0.5cm. However, all PP thread oriented sawdustboards showed higher values than control saw-dustboard. 5. Moduli of rupture in the majority of PP chip and oriented thread combining boards were higher than 80kgf/$cm^2$ on KS F 3104. Moduli of rupture in the boards combining longer PP chip with narrower 0.5cm spacing oriented thread showed high values. In accordance with the spacing increase of oriented thread, moduli of rupture in the PP chip and oriented thread combining boards showed increasing tendency compared with oriented sawdustboard. 6. Moduli of elasticity in one, two and three layer boards were lower than those of control sawdustboard, however, moduli of elasticity of oriented sawdustboards with 0.5, 1.0 and 1.5cm spacing increased 20, 18 and 10% compared with control sawdustboard, respectively. 7. Moduli of elasticity in the majority of PP chip and oriented thread combining boards in 0.5, 1.0 and 1.5cm oriented spacing showed much higher values than control sawdustboard. On the whole, moduli of elasticity in the oriented boards combined with 9% or less combination level and 0.5cm or more length of PP chip showed higher values than oriented sawdustboard. The increasing effect on modulus of elasticity was shown by the PP chip composition in oriented board with narrow spacing. 8. Internal bond strengths of all one layer PP chip combined boards showed lower values than control sawdust board, however, the PP chip combined boards in specific gravity of 0.63 and 0.72 exceeded 1.5kgf/$cm^2$, the low limit value of type 100 board and 3kgf/$cm^2$, type 200 board on KS F 3104, respectively. And also most of all two, three layer-and oriented boards exceeded 3kgf/$cm^2$ on KS F. 9. In general, screw holding strength of one layer board combined with PP chip showed lower value than control sawdustboard, however, that of two or three layer board combined with PP chip did no decreased tendency, and even screw holding strength with the increase of PP chip composition. In the PP chip and oriented PP thread combining boards, most of the boards showed higher values than control sawdustboard in 9% or less PP chip composition.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.5
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• pp.36-43
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• 1999

A new design of a Direct Digital Frequency Synthesizer(DDFS) is presented, where a pipelined Coordinate Rotate Digital Computer(CORDIC) circuit is employed to calculate amplitude values of all the phase angles of sinusoidal waveforms produced. a near-optimal number of pipeline stages is determined based on an error analysis of calculated amplitude values in terms of the number of bits. The DDFS was implemented using a field programmable gate array, yielding a stable operating frequency of 11.75MHz. The measurement results show higher resolution, faster operating speed and simpler fabrication process, compared to ROM-based counterparts. The CORDIC-based DDFS yields 5 times higher resolution than conventional ROM-based versions.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.6
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• pp.43-49
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• 2022

FMCW(Frequency Modulated Continuous Wave) Radar is very useful for vehicle collision warning system and autonomous driving sensor. In this paper, the design and implementation of FMCW radar based on two chip MMIC developed as an autonomous driving sensor was described. Especially, generation of frame-based and chirp-based waveform generation and signal processing are mixed to have the strength of maximum detection speed and compensation of speed. This implemented system was analyzed for performance and commercialization potential through lab. test and driving test in K-city.

• Journal of the Korea Concrete Institute
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• v.21 no.2
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• pp.179-186
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• 2009

The peculiarity pointed out for high strength concrete is the occurrence of spalling during a fire. Recently, there are many efforts such as development of all types of spalling reducing materials and other innovative materials in various fields. Need is now to examine the adequate mixing proportions of these materials. This study intended to derive experimentally and statistically mix proportions that can represent the basic quality requirements as well as the optimal effects on the fire-resistance for 4 types of functional materials that are metakaolin, waste tire chip, polypropylene fiber and steel fiber. Here, the tests were planned through an optimal test method using an orthogonal array table with 4 parameters and 3 levels. The statistical analysis adopted the response surface analysis method. Results verified mutual complementary contribution between the materials when using a combination of the functional materials selected as parameters for the strengthening of the fire-resistance of 80 MPa-class high strength concrete. Besides, the optimal conditions of the fire-resistance strengthening materials derived through response surface analysis were a volumetric replacement of silica fume by 80% of metakaolin, a volumetric replacement of fine aggregates by 3% of tire waste chip, and an addition of 0.2% of the whole volume by polypropylene fiber without mixing of steel fiber. In such cases, the basic characteristics as well as the fire-resistant characteristics of high strength concrete were also satisfied.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.4
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• pp.913-920
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• 2011

In this paper, a logic process based 1-kbit EEPROM IP for RFID tag chips of 900MHz is designed. The cell array of the designed 1-kbit EEPROM IP is arranged in a form of four blocks of 16 rows x 16 columns, that is in a two-dimensional arrangement of one-word EEPROM phantom cells. We can reduce the IP size by making four memory blocks share CG (control gate) and TG (tunnel gate) driver circuits. We propose a TG switch circuit to supply respective TG bias voltages according to operational modes and to keep voltages between devices within 5.5V in terms of reliability in order to share the TG driver circuit. Also, we can reduce the power consumption in the read mode by using a partial activation method to activate just one of four memory blocks. Furthermore, we can reduce the access time by making BL (bit line) switching times faster in the read mode from reduced number of cells connected to each column. We design and compare two 1-kbit EEPROM IPs, two blocks of 32 rows ${\times}$ 16 columns and four blocks of 16 rows ${\times}$ 16 columns, which use Tower's $0.18{\mu}m$ CMOS process. The four-block IP is smaller by 11.9% in the layout size and by 51% in the power consumption in the read mode than the two-block counterpart.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.5 s.335
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• pp.15-22
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• 2005

This paper proposes an efficient structure which is able to perform self-detection and self-repair for faults in a digital system by imitating the structure of living beings. The self-repair system is composed of artificial cells, which have homogeneous structures in the two-dimension, and spare cells. An artificial cell is composed of a logic block based on multiplexers, and a genome block, which controls the logic block. The cell is designed using DCVSL (differential cascode voltage switch logic) structure to self-detect faults. If a fault occurs in an artificial cell, it is self-detected by the DCVSL. Then the artificial cells which belong to the column are disabled and reconfigured using both neighbour cells and spare cells to be repaired. A self-repairable 2-bit up/down counter has been fabricated using Hynix $0.35{\mu}m$ technology with $1.14{\times}0.99mm^2$ core area and verified through the circuit simulation and chip test.

• Journal of IKEEE
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• v.15 no.1
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• pp.57-63
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• 2011

This paper presents a tunable band pass filter (BPF) for multi bio-signal detection. The bandwidth can be controlled by the bias current of transconductance (gm), while conventional BPF exploited switchable capacitor array for band selection. With this design technique, the die area of proposed BPF reduced to at least one tenth the area of conventional design. The simulation results show the high cut-off frequency tuning range of from 100Hz to 1Khz. The circuit was implemented with a 0.18um CMOS standard technology. Total current consumption is 1uA at the supply voltage of 1V with sub-threshold design technique.

• The KIPS Transactions:PartA
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• v.14A no.5
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• pp.301-308
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• 2007

This paper proposes high performance coprocessor architecture for real time dense disparity computation based on a phase-based binocular stereo matching technique called local weighted phase-correlation(LWPC). The algorithm combines the robustness of wavelet based phase difference methods and the basic control strategy of phase correlation methods, which consists of 4 stages. For parallel and efficient hardware implementation, the proposed architecture employs SIMD(Single Instruction Multiple Data Stream) architecture for each functional stage and all stages work on pipelined mode. Such that the newly devised pipelined linear array processor is optimized for the case of row-column image processing eliminating the need for transposed memory while preserving generality and high throughput. The proposed architecture is implemented with Xilinx HDL tool and the required hardware resources are calculated in terms of look up tables, flip flops, slices, and the amount of memory. The result shows the possibility that the proposed architecture can be integrated into one chip while maintaining the processing speed at video rate.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.3
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• pp.158-164
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• 2002

2-6 GHz digital phase shifter module has been designed and fabricated. For the broadband operation and performance, MMIC phase shifter chip for phase shifter module was designed and fabricated by using the reflection-type circuits with Lange coupler. The fabricated phase shifter module shows 6.1$^{\circ}$RMS phase error, 13.5 dB maximum insertion loss, and 8 dB and 10 dB input and output return losses, respectively. Computer controlled measurement systems are realized in order to get the measured data of 32 phase states. The RMS insertion phase error and the average insertion loss deviation among 8${\times}$8 modules for the phased-array system are less than ${\pm}$0.5$^{\circ}$and ${\pm}$0.5 dB, respectively. The size of fabricated phase shifter module is 45 ${\times}$ 22.5 ${\times}$60㎣.