• Journal of the Semiconductor & Display Technology
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• v.5 no.4 s.17
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• pp.17-22
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• 2006

In the manufacturing processes of semiconductor, test process is important for quality of products. In the manufacturing process of dynamic memory, memory test is more important. So, automatic test equipment(ATE) is used necessarily. But, according to increase of speed of dynamic memory operation, the rapid test equipment is needed. Impedance matching between ATE and dynamic memory is expected to be an important problem for making a rapid test equipment over 1Gbps. According to increase of speed, inner impedance of ATE also works on important parameter for test. This paper is about the method that is for impedance matching of inner impedance and coaxial cable occurring in manufacturing of ATE. We proved effects of inner impedance by electric theory and verified the method of impedance matching using computer simulation.

• Journal of the Semiconductor & Display Technology
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• v.3 no.4
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• pp.19-27
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• 2004

The characteristic evaluation of A/D converter is to measure the linearity of the converter. The evaluation of the linearity is to measure the DNL, INL, gain error and offset error in the various test parameters of A/D converter. Generally, DNL and INL are to be measured by the Histogram Test Algorithm in the DSP-based ATE environment. And gain error and offset error are to be measured by the calculation equation of the measuring algorithm. It is to propose the new Concurrent Histogram Test Algorithm for the test of the housekeeping A/D converter used in the CDMA cellular phone. Using the proposed method, it is to measure the DNL, INL, gain error and offset error concurrently and to show the measured results.

• Journal of the Semiconductor & Display Technology
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• v.22 no.1
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• pp.124-128
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• 2023

Semiconductor engineers have long sought to enhance the energy efficiency of mobile semiconductors by reducing their voltage. During the final stages of the semiconductor manufacturing process, the screening and evaluation of voltage is crucial. However, determining the optimal test start voltage presents a significant challenge as it can increase testing time. In the semiconductor manufacturing process, a wealth of test element group information is collected. If this information can be controlled to predict the test voltage, it could lead to a reduction in testing time and increase the probability of identifying the optimal voltage. To achieve this, this paper is exploring machine learning techniques, such as linear regression and ensemble models, that can leverage large amounts of information for voltage prediction. The outcomes of these machine learning methods not only demonstrate high consistency but can also be used for feature engineering to enhance accuracy in future processes.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.3
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• pp.203-212
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• 2004

The heat pipe for cooling power semiconductor is required no performance changing during the life cycle up to 20 years. For the long reliable performance of the heat pipe, my reasons that has possibility to generate non condensable gases we not allowed. In this research, the maximum heat transport rate and operation characteristics that are related to various geometric and thermal conditions are carried out. Also the test items, specifications and methods to guarantee the long life cycle of the heat pipe for power semiconductor cooling device are provided and the tests are performed.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.1
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• pp.105-114
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• 2004

In this paper, we design the circuits for DC parameter test of semiconductor devices. The DC parameter tester is the system which inspects the DC parameters of semiconductor devices. In the designed circuits, voltage(current) forcing current(voltage) sensing methods are used to inspect the parameters. The designed circuits are simulated by OR-CAD. The simulation results have good performance.

• The Magazine of the IEIE
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• v.19 no.5
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• pp.108-116
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• 1992

• Journal of the Korean Institute of Intelligent Systems
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• v.22 no.6
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• pp.694-699
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• 2012

In this paper, semiconductor package inspection results using white light interferometer with large F.O.V., in order to apply semiconductor product inspection process, are shown. Experimental 3D data repeatability test results for the same special bumps of each substrate are shown. Experimental 3D data repeatability test results for all the bumps in each substrate are also shown. Semiconductor package inspection using white light interferometer with large F.O.V. is very important for the fast 3D data inspection in semiconductor product inspection process. This paper is surely helpful for the development of in-line type fast 3D data inspection machine.

• Korean Journal of Metals and Materials
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• v.46 no.5
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• pp.310-314
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• 2008

Electromigration test of flip chip solder bump is performed at $140^{\circ}C$ C and $4.6{\times}10^4A/cm^2$ conditions in order to compare electromigration with thermomigration behaviors by using electroplated Sn-3.5Ag solder bump with Cu under-bump-metallurgy. As a result of measuring resistance with stressing time, failure mechanism of solder bump was evaluated to have four steps by the fail time. Discrete steps of resistance change during electromigration test are directly compared with microstructural evolution of cross-sectioned solder bump at each step. Thermal gradient in solder bump is very high and the contribution of thermomigration to atomic flux is comparable with pure electromigration effect.

• Journal of the Semiconductor & Display Technology
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• v.22 no.4
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• pp.113-118
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• 2023

Maintenance of semiconductor equipment processes is crucial for the continuous growth of the semiconductor market. The process must always be upheld in optimal condition to ensure a smooth supply of numerous parts. Additionally, it is imperative to monitor the status of the robots that play a central role in the process. Just as many senses of organs judge a person's body condition, robots also have numerous sensors that play a role, and like human joints, they can detect the condition first in the joints, which are the driving parts of the robot. Therefore, a normal state test bed and an abnormal state test bed using an aging reducer were constructed by simulating the joint, which is the driving part of the robot. Various sensors such as vibration, torque, encoder, and temperature were attached to accurately diagnose the robot's failure, and the test bed was built with an integrated system to collect and control data simultaneously in real-time. After configuring the user screen and building a database based on the collected data, the characteristic values of normal and abnormal data were analyzed, and machine learning was performed using the KNN (K-Nearest Neighbors) machine learning algorithm. This approach yielded an impressive 94% accuracy in failure diagnosis, underscoring the reliability of both the test bed and the data it produced.

• Analytical Science and Technology
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• v.25 no.2
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• pp.127-132
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• 2012

A test tool for self-leveling and flowing characters of coating materials used to semiconductors and electronic parts, especially for protection of LCD and PDP connectors, was designed, and the test tool was evaluated using polymeric siloxane coating materials which have various viscosities. The test results showed that the designed test tool was effective to measure self-leveling and flowing properties of coating materials. Therefore, considering that the viscosity is not directly correlated with self-leveling and flowing properties, we believe that this test tool will be a very useful tool for measurement instead of classical method using viscosities of coating materials. Particularly, the measurement of self-leveling and flowing properties using the test tool would be expected to be used in the area of selecting suitable protective coating materials for LCD (Liquid Crystal Display), PDP (Plasma Display Panel) and semiconductor connection parts.