• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.753-756
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• 2013

This paper analyzed the change of subthreshold current for channel dimension of double gate(DG) MOSFET. The nano-structured DGMOSFET to reduce the short channel effect had to be preciously analyze. Poisson's equation had been used to analyze the potential distribution in channel, and Gaussian function had been used as carrier distribution. The subthreshold current had been analyzed for device parameters such as channel dimension, and projected range and standard projected deviation of Gaussian function. Since this potential model was verified in the previous papers, we used this model to analyze the subthreshold current. Resultly, we know the subthreshold current was influenced on parameters of Gaussian function and channel dimension for DGMOSFET.

• Journal of the Korean Institute of Telematics and Electronics
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• v.14 no.2
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• pp.10-16
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• 1977

Memory switching of the amorphous chalcogenide Ge-Te-Si memory devices were observed at various thicknesses and temperatures. For a given thickness, the distribution of threshold voltages shows a strong peaks, which is attributed to the intrinsic switching mechanism. The plot of Vth versus thickness indicates that threshold voltages were lowered and switching fields were raised as thickness was decreased. And threshold voltage sagged as temperature was raised and the fact that threshold voltage can be lowered at the temperature range under Tg was obtained.

• Journal of the Korean Society for Railway
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• v.13 no.5
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• pp.504-508
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• 2010

The development of high voltage Insulated Gate Bipolar Transistor (IGBT) have given new device advantage in the areas where they compete with conventional GTO (Gate Turnoff Thyristor) technology. The IGBT combines the advantages of a power MOSFET (Metal-Oxide Semiconductor Field-Effect Transistor) and a bipolar power transistor. The change of electrical characteristics for IGBT is mainly coming from the change of characteristics of MOSFET at the input gate and the PNP transistors at the output. The change of threshold voltage, which is one of the important design parameters, is brought by charge trapping at the gate oxide under the environment that radiation exists. The energy loss will be also studied as the inductance values are changed. In this paper, the electrical characteristics are simulated by SPICE, and compared for variation of inductance and threshold voltage based on IGBT.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1279-1280
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• 2007

$Al_{2}O_{3}$ 절연막을 전하포획층으로 이용하여 Top 게이트 ZnO 나노선 전계효과트랜지스터를 제작하였고, 메모리 효과를 관찰하였다. $Al_{2}O_{3}$ 층을 게이트 절연막과 전하포획층으로 사용하였다. 대표적인 Top 게이트 ZnO 나노선 전계효과트랜지스터에 대하여 게이트 전압을 Double sweep 하였을 때의 드레인 전류-게이트 전압 특성이 반시계 방향의 히스테리시스와 문턱전압변화를 나타냈다. 펄스 형태의 게이트 전압을 1초 동안 인가한 후에, 드레인 전류-게이트 전압 특성의 문턱전압 변화가 0.3 V에서 0.8 V로 증가하였다. 이러한 특성은 게이트 전극에서 음전하 캐리어가 음의 게이트 전압에 대하여 $Al_{2}O_{3}$ 층에 충전되고, 양의 게이트 전압에 대하여 방전되는 것을 나타낸다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.726-728
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• 2012

In this paper, the threshold voltage characteristics have been analyzed by varying the channel thicknesses of Double Gate MOSFET. The channel thickness, as well as determining the size of the device which hardly affects SCE(Short Channel Effects), therefore the channel thicknesses is a very important parameter in the IC(Integrated circuit) design. In this study, using series charge distribution to analyze the threshold voltage on the channel thickness. Consequently, the threshold voltage decreases with increasing a channel thickness.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2018.05a
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• pp.173-174
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• 2018

This paper compared the electrical coupling of the monolithic 3D inverter consisting of MOSFET and JLFET. In the case of both the MOSFET and the JLFET, MOSFET and JLFET have a small threshold voltage variation when the thickness of inter-layer dielectric (ILD) = 100 nm. However, when the thickness of ILD = 10 nm, the threshold voltage variation is larger and the JLFET is twice as much as the MOSFET.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.1
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• pp.123-128
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• 2014

This paper analyzed the change of subthreshold current for channel dimension of double gate(DG) MOSFET. The nano-structured DGMOSFET to reduce the short channel effect had to be preciously analyze. Poisson's equation had been used to analyze the potential distribution in channel, and Gaussian function had been used as carrier distribution. The subthreshold current had been analyzed for device parameters such as channel dimension, and projected range and standard projected deviation of Gaussian function. Since this potential model was verified in the previous papers, we used this model to analyze the subthreshold current. Resultly, we know the subthreshold current was influenced on parameters of Gaussian function and channel dimension for DGMOSFET.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.762-765
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• 2013

This paper analyzed the change of subthreshold current for gate oxide thickness of double gate(DG) MOSFET. Poisson's equation had been used to analyze the potential distribution in channel, and Gaussian function had been used as carrier distribution. The potential distribution was obtained as the analytical function of channel dimension, using the boundary condition. The subthreshold current had been analyzed for gate oxide thickness, and projected range and standard projected deviation of Gaussian function. Since this analytical potential model was verified in the previous papers, we used this model to analyze the subthreshold current. Resultly, we know the subthreshold current was influenced on parameters of Gaussian function and gate oxide thickness for DGMOSFET.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.768-771
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• 2013

This paper analyzed the change of subthreshold current for channel doping concentration of double gate(DG) MOSFET. Poisson's equation had been used to analyze the potential distribution in channel, and Gaussian function had been used as carrier distribution. The potential distribution was obtained as the analytical function of channel dimension, using the boundary condition. The subthreshold current had been analyzed for channel doping concentration, and projected range and standard projected deviation of Gaussian function. Since this analytical potential model was verified in the previous papers, we used this model to analyze the subthreshold current. As a result, we know the subthreshold current was influenced on parameters of Gaussian function and channel doping concentration for DGMOSFET.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.185-185
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• 2013

반도체 트랜지스터의 집적화 기술이 발달하고 소자가 나노미터 크기로 집적화 됨에 따라 문턱 전압의 변동, 높은 누설 전류, 문턱전압 이하에서의 기울기의 열화와 같은 단 채널 효과가 문제되고 있다. 이러한 문제점들은 비 휘발성 플래시 메모리에서 메모리 윈도우의 감소에 따른 retention 특성을 저하시킨다. 이중 게이트 구조의 metal-oxide-semiconductor field-effect-transistors (MOSFETs)은 이러한 단 채널 효과 중에서도 특히 문턱 전압의 변동을 억제하기 위해 제안되었다. 이중 게이트 MOSFETs는 상부 게이트와 하부 게이트 사이의 capacitive coupling을 이용하여 문턱전압의 변동의 제어가 용이하다는 장점을 가진다.기존의 플래시 메모리는 쓰기 및 지우기 (P/E) 동작, 그리고 읽기 동작이 채널 상부의 컨트롤 게이트에 의하여 이루어지며, 메모리 윈도우 및 신뢰성은 플로팅 게이트의 전하량의 변화에 크게 의존한다. 이에 따라 메모리 윈도우의 크기가 결정되고, 높은 P/E 전압이 요구되며, 터널링 산화막에 인가되는 높은 전계에 의하여 retention에서의 메모리 윈도우의 감소와 산화막의 물리적 손상을 초래하기 때문에 신뢰성 및 수명을 열화시키는 원인이 된다. 따라서 본 연구에서는, 상부 게이트 산화막과 하부 게이트 산화막 사이의 capacitive coupling 효과에 의하여 하부 게이트로 읽기 동작을 수행하면 메모리 윈도우를 크게 증폭시킬 수 있고, 이에 따라 동작 전압을 감소시킬 수 있는 이중 게이트 구조의 플래시 메모리를 제작하였다. 그 결과, capacitive coupling 효과에 의하여 크게 증폭된 메모리 윈도우를 얻을 수 있음을 확인하였고, 저전압 구동 및 신뢰성을 향상시킬 수 있음을 확인하였다.