• Proceedings of the International Microelectronics And Packaging Society Conference
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• 1999.12a
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• pp.155-162
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• 1999

A bare chip packaging technology by an encapsulated flip chip bonding on a build-up printed circuit board has emerged in 1991. Since then, it enabled a high density and low cost semiconductor packaging such as a direct chip bonding on mother board and high density surface mount components, such as BGA and CSP. This technology can respond to various requirements from applications and is considered to take over a main role of semiconductor packaging in the next decade.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.2
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• pp.41-47
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• 2010

The effect of PCB and BGA pad designs was investigated on the mechanical property of Pb-free solder joints. The mechanical property of solder joint was tested by three different test methods of drop impact tests, bending impact test, and high speed shear test. Two kinds of pad design such as NSMD (Non-Solder Mask Defined) and SMD (Solder Mask Defined) were applied with the OSP finished Pb-free solder (Sn-3.0Ag-0.5Cu, Sn-1.2Ag-0.5Cu). in the drop impact test and bending impact test, the characterized lifetime showed the same tendency, and SMD design showed better mechanical property of solder joint than NSMD regardless of test method, which was due to the different crack path. The fracture crack on SMD pad was propagated along the intermetallic compound (IMC) layer of solder joint, while the fracture crack on NSMD pad propagated through upper edge of land which shields pattern. In the high speed shear test, pad lift occurred on the solder joint of NSMD. SMD/SMD combination of pad design consequently illustrated the best mechanical property of BGA/PCB solder joint, followed by SMD/NSMD, NSMD/SMD, and NSMD/NSMD.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.4 s.37
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• pp.289-299
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• 2005

The ball shear force was investigated in terms of test parameters, i.e. displacement rate and probe height, with an experimental and non-linear finite element analysis for evaluation of the solder joint integrity in area array packages. The increase in the displacement rate and the decrease in the probe height led to the increase in the shear force. Excessive probe height could cause some detrimental effects on the test results such as unexpected high standard deviation and probe sliding from the solder ball surface. The low shear height conditions were favorable for assessing the mechanical integrity of the solder joints. The mechanical and electrical properties of the Sn-37Pb/Cu and Sn-3.5Ag/Cu BGA solder joints were also investigated with the number of reflows. The total thickness of the intermetallic compound (IMC) layers, consisting of Cu6Sn5 and Cu3Sn, was increased as a function of cubic root of reflow time. The shear force was increased up to 3 or 4 reflows, and then was decreased with the number of reflows. The fracture occurred along the bulk solder, in irrespective of the number of reflows. The electrical resistivity was increased with increasing the number of reflows.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.4
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• pp.77-86
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• 2008

The reliability of leaded and lead-free solders of BGA type packages on a printed circuit board was investigated by employing the standard drop test and 4-point bending test. Tested solder joints were examined by optical microscopy to identify associated failure mode. Three-dimensional finite element analysis(FEM) with ANSYS Workbench v.11 was carried out to understand the mechanical behavior of solder joints under the influence of bending or drop impact. The results of numerical analysis are in good agreement with those obtained by experiments. Packages in the center of the PCB experienced higher stress than those in the perimeter of the PCB. The solder joints located in the outermost comer of the package suffered from higher stress than those located in center region. In both drop and bending impact tests, the lead-free solder showed better performances than the leaded solders. The numerical analysis results indicated that stress and strain behavior of solder joint were dependent on various effective parameters.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.4
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• pp.65-70
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• 2008

The mechanical shear strength of BGA(Ball Grid Array) solder joints under high impact loading was investigated. The Sn-37Pb solder balls with a diameter of $500{\mu}m$ were placed on the pads of FR-4 substrates with ENIG(Electroless Nickel Immersion Gold) surface treatment and reflowed. For the High Temperature Storage(HTS) test, the samples were aged a constant testing temperature of $120^{\circ}C$ for up to 250h. After the HTS test, high speed shear tests with various shear speed of 0.01, 0.1, 1, 3 m/s were conducted. $Ni_3Sn_4$ intermetallic compound(IMC) layer was observed at the solder/Ni-P interface and thickness of IMC was increased with aging process. The shear strength increased with increasing shear speed. The fracture surfaces of solder joints showed various fracture modes dependent on shear speed and aging time. Fracture mode was changed from ductile fracture to brittle fracture with increasing shear speed.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.3
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• pp.53-57
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• 2013

Although the lowering of Ag content in Sn-3.0Ag-0.5Cu is known to improve the mechanical shock reliability of the solder joint, it is also known to be detrimental to the solderbility. In this study, the quaternary alloying effect of In and the minor alloying effects of Mn and Pd on the solderability, thermal cycling and mechanical shock reliabilities of the low Ag content Sn-1.2Ag-0.7Cu solder were investigated using board-level BGA packages. The solderability of Sn-1.2Ag-0.7Cu-0.4In was proved to be comparable to that of Sn-3.0Ag-0.5Cu but its thermal cycling reliability was inferior to that of Sn-3.0Ag-0.5Cu. While the 0.03 wt% Pd addition to the Sn-1.2Ag-0.7Cu-0.4In decreased the solderability and reliabilities of solder joint, the 0.1 wt% Mn addition was proved to be beneficial especially for the mechanical shock reliability compared to those of Sn-3.0Ag-0.5Cu and Sn-1.0Ag-0.5Cu compositions. It was considered to be due that the Mn addition decreased the Young's modulus of low Ag content Pb-free solders.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.35-40
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• 2010

In this study, the reliability of thermal shock, thermal cycle, and complex vibration test at high temperature were examined for 3 types of lead-free solder alloys, Sn-3.5Ag, Sn-0.7Cu and Sn-5.0Sb. For the reliability test, daisychained BGA chips with ENIG-finished Cu pad was assembled with the three lead-free solders on OSP-finished PCBs. Among the 3 types solder alloys, Sn-3.5Ag solder alloy showed the highest degradation rate of electrical resistance and joint strength. On the other hand, Sn-0.7Cu solder alloy had high stability after the reliability tests.

• Journal of the Microelectronics and Packaging Society
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• v.16 no.1
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• pp.7-11
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• 2009

In this study, solder joints were made with Sn-3.5Ag (wt%) solder ball. Electroless nickel / immersion gold (ENIG) printed circuit board (PCB) substrates were employed in this work. The mechanical and electrical properties were measured as a function of the number of reflow. Die shear strength was measured with increasing reflow number. Until the forth or fifth reflow, shear force increased and after the fifth reflow the shear force of die decreased. The electrical resistivity of solder joint linearly increased with increasing reflow number.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.09a
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• pp.219-225
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• 2002

This paper presents a novel "bumpless flip chip package"for cost! performance driven devices. Using the conventional electroplating and etching processes, this package enables the production of fine pitch BGA up to 256 I/O with single layer routing. An array of circuitry down to $25-50{\mu}{\textrm}{m}$ line/space is fabricated to fan-in and fan-out of the bond pads without using bumps or substrate. Various types of joint methods can be applied to connect the fine trace and the bond pad directly. The resin-filled terminal provides excellent compliancy between package and the assembled board. More interestingly, the thin film routing is similar to wafer level packaging whereas the fan-out feature enables high lead count devices to be accommodated in the BGA format. Details of the design concepts and processing technology for this novel package are discussed. Trade offs to meet various cost or performance goals for selected applications are suggested. Finally, the importance of design integration early in the technology development cycle with die-level and system-level design teams is highlighted as critical to an optimal design for performance and cost.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2004.09a
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• pp.233-241
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• 2004

A new alloy definition will be presented concerning increasing demands for the board level reliability of miniaturized interconnections. The damage mechanism for LFBGA components on different board finishes is not quite understood. Further demands from mobile phones are the drop test, characterizing interface performance of different package constructions in relation to decreased pad constructions and therefore interfaces. The paper discusses the characterization of interfaces based on SnPb, SnPbXYZ, SnAgCu and SnAgCuInNd ball materials and SnAgCuInNd as solder paste, the stability after accelerated tests and the description of modified interfaces strictly related to the assembly conditions, dissolution behavior of finishes on board side and the influence of intermetallic formation. The type of intermetallic as well as the quantity of intermetallics are observed, primaliry the hardness, E modules describing the ability of strain/stress compensation. First results of board level reliability are presented after TCT-40/+150. Improvement steps from the ball formulation will be discussed in conjunction to the implementation of lead free materials In order to optimize ball materials for area array devices accelareted aging conditions like TCTs were used to analyze the board level reliability of different ball materials for BGA, LFBGA, CSP, Flip Chip. The paper outlines lead-free ball analysis in comparison to conventional solder balls for BGA and chip size packages. The important points of interest are the description of processability related to existing ball attach procedures, requirements of interconnection properties and the knowledge gained the board level reliability. Both are the primary acceptance criteria for implementation. Knowledge about melting characteristic, surface tension depend on temperature and organic vehicles, wetting behavior, electrical conductivity, thermal conductivity, specific heat, mechanical strength, creep and relaxation properties, interactions to preferred finishes (minor impurities), intermetallic growth, content of IMC, brittleness depend on solved elements/IMC, fatigue resistance, damage mechanism, affinity against oxygen, reduction potential, decontamination efforts, endo-/exothermic reactions, diffusion properties related to finishes or bare materials, isothermal fatigue, thermo-cyclic fatigue, corrosion properties, lifetime prediction based on board level results, compatibility with rework/repair solders, rework temperatures of modified solders (Impurities, change in the melting point or range), compatibility to components and laminates.