• Proceedings of the Korean Society of Propulsion Engineers Conference
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• 2007.11a
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• pp.174-177
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• 2007

In this work, we researched static and dynamic characteristics concern to hydraulic regulator control process and parameter setting, which is used on liquid rocket engine regulation. The hydraulic regulator of 8K14 "SCUD" 9D21 engine is analyzed and on the basis of the developed mathematical modeling the analysis of response time and certification on automatic control accuracy is carried out. In this process, we find out specific design configuration of needle valve flow section that effects on pressure regulation performance.

• Journal of the Korean Society of Propulsion Engineers
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• v.15 no.2
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• pp.74-83
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• 2011

For launcher applications, different from other applications, very high flow rate is required which can lead to supply pressure drop against required setting pressure. The supply pressure decrease is closely related to regulator characteristics. In this paper, supply pressure offset is investigated considering regulators as kinds of control systems. Pressure offset of self-operated regulator is analyzed with sensitive parameter defined as the ratio of valve travel to pressure offset. It is shown that pressure offset of self-operating regulator can be improved by incorporating proportional and integral controls and they can be materialized with pilot regulator systems.

• Journal of the Korean Institute of Gas
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• v.11 no.4
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• pp.12-16
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• 2007

The fuel pressure regulator mounted on CNG vehicles is used to maintain a constant pressure in the fuel injection system. It needs precise fuel pressure control to obtain benefits of high efficiency and low emissions in CNG vehicles. In this study, a high pressure test rig for the performance evaluation of CNG regulators was introduced. Two different CNG regulators were tested and compared each other at various test conditions. Results showed that dynamic response and creep characteristics are directly effected by the valve assembly design. Gas temperature was dramatically dropped at hish supply pressure conditions, so that effective design for coolant bowl is needed to prevent icing problem.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.6
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• pp.2729-2734
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• 2011

In this paper, an active replica Low-dropout(LDO) regulator with DC voltage matching circuit is presented. In order to match the voltage between replica and output of regulator, DC voltage matching circuit is designed. The active replica low dropout regulator has higher Power Supply Rejection(PSR) than that of conventional regulator. The designed DC voltage matching circuit can reduce the drawback that may be occurred in replica regulator. And using fully active element in regulator can reduce the chip area and heat noise with resistor. As results of HSPICE simulation with 0.35um CMOS parameter, the designed active replica LDO regulator achieves Power Supply Rejection, -28@10Hz better than -17@10Hz of conventional replica regulator without DC matching circuit. And the output voltage is 3V.

• Journal of IKEEE
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• v.19 no.3
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• pp.304-310
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• 2015

A SCALDO(Supercapacitor Assisted LDO) regulator is a new regulator having advantages of a SMPS(Switch Mode Power Supply) which has a good efficiency and a LDO(Low Drop-out) regulator which has stable output characteristics and good EMI(Electro Magnetic Interference) characteristics. However, a conventional SCALDO regulator needs a lot of power consumption to control its switches and it drops an efficiency of the circuit. In this paper, to reduce switching power consumption and improve an efficiency of the circuit, a new SCALDO regulator adopting MOSFETs as its switching parts is proposed and it is found out that the proposed SCALDO regulator has the maximum 9.5% higher efficiency than the conventional SCALDO regulator. We also try to simplify production process of the circuit by changing switching control method of the circuit from MCU(Micro-controller unit) based firmware control to hardware control using a comparator and a T-F/F(Flip Flop).

• Proceedings of the KAIS Fall Conference
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• 2010.11a
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• pp.378-381
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• 2010

본 논문에서는 LDO레귤레이터의 PSRR을 향상 및 전압가변 조정이 가능한 능동 Replica LDO 레귤레이터를 설계하였다. 일반적인 레귤레이터의 PSRR과 회로의 안정성 확보를 위해서 사용된 Replica회로의 경우, 안정된 동작을 유지하기 위해서는 DC 매칭이 이루어져야 한다. 본 논문에서는 능동 Replica LDO회로를 제안하였다. 제안된 회로는 CMFB회로에 의하여 DC 전위의 매칭이 이루어지도록 하였으며, 레귤레이터의 출력전압도 일정한 범위내에서 조정이 가능하다. 또한 HSPCIE시뮬레이션 결과, 제안된 능동 Replica LDO회로의 PSRR특성이 기존 LDO구조에 비하여 좋은 결과을 얻을 수 있음을 확인하였다.

• Proceedings of the KIPE Conference
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• 2020.08a
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• pp.76-78
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• 2020

본 논문에서는 부스트 프리레귤레이터가 통합된 새로운 고효율 고정-주파수 LLC 공진형 컨버터를 제안한다. 기존 부스트 프리레귤레이터가 사용된 2단-구조의 컨버터는 연속적인 입력전류 및 넓은 전압이득 범위를 가져 태양광 및 연료전지에 적합한 토폴로지이다. 하지만, 부스트 프리레귤레이터 단에서 하드 스위칭으로 인한 큰 스위칭 손실, 큰 다이오드 도통 손실이 발생하여 낮은 효율을 갖는 문제가 발생한다. 따라서 이를 해결하기 위해, 제안된 회로는 부스트 프리레귤레이터를 통합시킨 새로운 구조를 사용하여 모든 스위치의 영전압 스위칭을 달성하고, 다이오드를 소거하였다. 따라서 제안된 회로는 높은 효율을 갖는다. 제안된 회로의 효용성을 증명하기 위해, 24-32V 입력전압과 12-16V(200W)출력에서 실험이 진행되었다.

• Journal of IKEEE
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• v.20 no.3
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• pp.307-309
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• 2016

In this paper, we propose LDO regulator with improved transient using a simple feedback structure in conventional LDO regulator. This proposed circuit has the feedback structure which reduces the response time of overshoot appeared in the output of conventional LDO regulator. Therefore, this LDO regulator can be a more stable operation. Thus, the proposed feedback structure is to operate such as conventional LDO regulator without changing the area, it complements the disadvantage of LDO regulator with noise in the output. This circuit was designed to using a Dongbu Hitek 0.18um CMOS process.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.1
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• pp.627-633
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• 2015

We designed of a LDO regulator with a OVP and UVLO protection function for a PMIC. Proposed LDO regulator circuit consists of a BGR reference circuit, an error amplifier and a power transistor and so on. The proposed LDO regulator is designed for low voltage input power protection. Proposed LDO circuit generated fixed 2.5 V from a supply of 3.3V. It was designed with 3.3 V power supply using a $0.35{\mu}m$ CMOS technology. SPICE simulation results showed that the proposed circuit provides 0.713 mV/V line regulation with output 2.5 V ~ 3.9 V and $8.35{\mu}V/mA$ load regulation with load current 0 mA to 40 mA.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.10
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• pp.239-244
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• 2013

This paper presents a design of the CMOS LDO regulator with a UVLO protection function for a high speed PMIC. Proposed LDO regulator circuit consists of a BGR reference circuit, an error amplifier and a power transistor and so on. UVLO block between the power transistor and the power supply is added for a low input protection function. Also, UVLO block showed normal operation with turn-off voltage of 2.7V and turn-on voltage of 4 V in condition of 5 V power supply. Proposed circuit generated fixed 3.3 V from a supply of 5V. From SPICE simulation results using a $1{\mu}m$ high voltage CMOS technology, simulation results were 5.88 mV/V line regulation and 27.5 uV/mA load regulation with load current 0 mA to 200 mA.