• Journal of the Institute of Convergence Signal Processing
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• v.4 no.1
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• pp.49-55
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• 2003

The use of digital filters in the signal process field is increasing rapidly with development of the modern industrial society. Especially, detail processors, Y/C separators, ghost removing filters, standard converters (NTSC to PAL or PAL to NTSC) and noise reducers, all of which use digital filters, tend to be used in digital video and audio processing, CATV and various communication fields. Generally, there are two different digital filters, the Rf (infinite impulse response) filter and the FIR (finite impulse response) filter in digital filter. In this paper, we have designed FIR filter which has the phase linearity and the easiness of creation. In the design of the FIR digital filter, the window function is used to alleviate the ripples caused by Gibbs Phenomenon around the cut off frequency of the band pass. But there're some problems to choose proper window function for the design destination due to its fixed values. Therefore, in this paper, we designed a modified Hanning window with new parameter which is adaptively chosen corresponding to design objectives. The digital filter was simulated to prove the validity of the model and it was compared with the Hamming, the Manning, the Blacknan and the Kaiser window function. And we have used peak side-lobe and transient characteristics as standard of judgement.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.310-312
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• 2011

In complex noise environment, digital filter is being used to obtain, transport and storage original voice or image signal. Digital filter can be largely separated FIR(Finite duration impulse response) filter and IIR(Infinite duration impulse response) filter. Among FIR filter, window function has characteristic of linear phase and as can be easily set pass-band frequency, cutoff frequency and so on. In this paper, We compared with established method using transient characteristic and peak side-lobe in order to check filter characteristics after we designed the existing variants of the window function.

• The KIPS Transactions:PartB
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• v.8B no.4
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• pp.395-402
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• 2001

본 논문에서는, 1차원 및 2차원 웨이브렛 함수를 전역통과필터(APF)와 지연기의 병렬접속에 위한 재귀형(IIR) 디지털 필터로 구성하는 방법을 제안한다. Mallat에 의하여 웨이브렛 변환과 필터뱅크가 밀접한 관계에 있다는 것이 알려졌고, 완전 재구성 필터뱅크로부터 웨이브렛 함수를 도출하는 다양한 방법이 알려져 있다. 그러나, 이러한 방법의 대부분은 비재귀형(FIR) 디지털 필터에 근거를 두는 것으로, 재귀형 디지털 필터에 의한 방법은 거의 제안되어 있지 않다. 재귀형 필터를 이용하는 장점은 비재귀형에 비하여 낮은 차수로 표현되는 점이다. 또 직교 웨이브렛 함수를 끌어내기 위한 직교조건을 용이하게 만족시킬 수 있다. 본 논문에서는 웨이브렛 함수에 요구되는 레귤레리티(Regularity)조건을 만족시키기 위하여, 최대 평탄성(Maximally Flat)을 부가한 새로운 1차원 및 2차원 재귀형 웨이브렛 함수의 도출법을 보인다.

• The Magazine of the IEIE
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• v.30 no.4
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• pp.422-422
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• 2003

본 논문에서는 기존의 기지국과 W-CDMA 시스템을 상호 연동하기 위한 SDR(Software Defined Radio) 기반의 멀티 밴드 디지털 IF 모듈 구현에 대해 소개한다. 하드웨어 플랫폼상에 테스트 및 시험 검증하기 위해서 크게 광대역 ADC, DAC, FPGA로 구성하였으며, FPGA 내에 디지털 필터 및 NCO 등의 응용 소프트웨어는 VHDL로 코딩하였다. 디지털 필터는 FPGA의 허용 자원을 고려하여 인터폴레이션 및 데시메이션을 위한 폴리페이즈 필터 뱅크로 구현하였다. 또한 송신단에서는 이미지 성분을 제거하기 위해 2단의 DCQM(Digital Complex Quadrature Modulation)을 적용하였으며, 이때 적용되는 NCO(Numerically Controlled Oscillator)는 1/4주기의 LUT를 사용하여 설계하였다. 수신단에서는 IF 단에 SAW 필터를 사용하지 않기 때문에 W-CDMA의 블록커 규약에 준하면서 근접 채널을 제거하기 위한 고출력의 감쇄 특성을 갖는 필터를 설계하였다. 본 논문에서는 컴퓨터 시뮬레이션 결과와 스펙트럼 분석기를 통해 측정된 결과를 비교 분석하였으며 이에 대한 디지털 IF 모듈의 성능을 검증하였다.

• The Magazine of the IEIE
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• v.30 no.4
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• pp.76-88
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• 2003

본 논문에서는 기존의 기지국과 W-CDMA 시스템을 상호 연동하기 위한 SDR(Software Defined Radio) 기반의 멀티 밴드 디지털 IF 모듈 구현에 대해 소개한다. 하드웨어 플랫폼상에 테스트 및 시험 검증하기 위해서 크게 광대역 ADC, DAC, FPGA로 구성하였으며, FPGA 내에 디지털 필터 및 NCO등의 응용 소프트웨어는 VHDL로 코딩하였다. 디지털 필터는 FPGA의 허용 자원을 고려하여 인터폴레이션 및 데시메이션을 위한 폴리페이즈 필터 뱅크로 구현하였다. 또한 송신단에서는 이미지 성분을 제거하기 위해 2단의 DCQM(Digital Complex Quadrature Modulation)을 적용하였으며, 이때 적용되는 NCO (Numerically Controlled Oscillator)는 1/4주기의 LUT를 사용하여 설계하였다. 수신단에서는 IF 단에 SAW필터를 사용하지 않기 때문에 W-CDMA의 블록커 규약에 준하면서 근접 채널을 제거하기 위한 고출력의 감쇄 특성을 갖는 필터를 설계하였다. 본 논문에서는 컴퓨터 시뮬레이션 결과와 스펙트럼 분석기를 통해 측정된 결과를 비교 분석하였으며 이에 대한 디지털 IF 모듈의 성능을 검증하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.7
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• pp.1346-1353
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• 2001

This paper presents an algorithm for the design of 2 dimension separable denominator digital filter(SDDF). The proposed algorithm is based on the reduced dimensional decomposition not only 2 dimension SDDF's but also of given 2 dimension specification. The frequency domain design of 2 dimension separable denominator digital filters based on the reduced dimensional decomposition can be realized when the given 2 dimension frequency specification are optimally decomposed into a pair of 1 dimension digital filter specification via singular value decomposition. the algorithm is computationally efficient and numerically stable. In case of the low pass filter, the approximation error of the proposed design algorithm is $e_{m}$=5.17, $e_{r1}$ =8.78, $e_{r2}$=7.34, while in case of band pass filter, the approximation error is $e_{m}$=13.00, $e_{r1}$=62.76, $e_{r2}$=62.7676.7676

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.5A
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• pp.743-750
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• 2000

In this paper, low-power block filtering architecture for digital If down sampler and up sampler is proposed. Software radio technology requires low power and cost effective digital If down and up sampler. Digital If down sampler and up sampler are accompanied with decimation filter and interpolation filter, respectively. In the proposed down sampler architecture, it is shown that the parallel and low-speed processing architecture can be produced by cancellation of inherent up sampler of block filter and down sampler. Proposed up sampler also utilizes cancellation of up sampler and inherent down sampler of block filtering structure. The proposed architecture is compared with the conventional polyphase architecture.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.8
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• pp.1753-1758
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• 2012

This paper introduces analog FIR filters based on a distributed amplifier and analyzes the proposed filter's characteristics. A simple design method of an analog FIR filter based on the digital filter design technique is also introduced. The proposed analog FIR filters are a moving average(MA) and a comb type filters with no multiplier. This simple structures of the proposed filters may enable to operate at multi-GHz frequency range and applicable to combine a filter and an amplifier of RF system. The proposed analog FIR filters were implemented with standard $0.18{\mu}m$ CMOS technology. The designed GHz analog FIR filters are simulated by Cadence Spectre and compared to the results of digital FIR filters obtained from MATLAB simulations. From the simulation results, the characteristics of the proposed analog FIR filters are fairly well matched with those of digital FIR filters.

• Journal of the Institute of Convergence Signal Processing
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• v.19 no.4
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• pp.153-161
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• 2018

This paper describes the performance improvement of Software (SW) digital filter using GPU (Graphical Processing Unit). The previous developed SW digital filter has a problem that it operates on a CPU (Central Processing Unit) basis and has a slow speed. The GPU was introduced to filter the data of the EAVN (East Asian VLBI Network) observation to improve the operation speed and to process data with other stations through filtering, respectively. In order to enhance the computational speed of the SW digital filter, NVIDIA Titan V GPU board with built-in Tensor Core is used. The processing speed of about 0.78 (1Gbps, 16MHz BW, 16-IF) and 1.1 (2Gbps, 32MHz BW, 16-IF) times for the observing time was achieved by filtering the 95 second observation data of 2 Gbps (512 MHz BW, 1-IF), respectively. In addition, 2Gbps data is digitally filtered for the 1 and 2Gbps simultaneously observed with KVN (Korean VLBI Network), and compared with the 1Gbps, we obtained similar values such as cross power spectrum, phase, and SNR (Signal to Noise Ratio). As a result, the effectiveness of developed SW digital filter using GPU in this research was confirmed for utilizing the data processing and analysis. In the future, it is expected that the observation data will be able to be filtered in real time when the distributed processing optimization of source code for using multiple GPU boards.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.16 no.8
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• pp.701-709
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• 1991

In this paper, an analysis approach for the performance of serial search burst format direct sequence spread spectrum[DS-SS] code aequision system using matched filter is persented. And an acquisition system using digital matched filter is chosen for the analysis by this approach. In this acqusition system, since chip decision should be performaned before matched filter