• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.7
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• pp.661-668
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• 2004

A novel method to reject the spurious signals which are occurred at Weaver-type low-IF transmitter was proposed in this paper. The spurious signals are generated by the gain and phase imbalances of I/Q channel or imperfect characteristics of 90$^{\circ}$ phase shifter in local oscillator for I/Q channel source. By deriving the gain and phase-based functions from RF spurious signal with the channel imbalance information, the lie channel imbalances were deduced as functions with magnitude and sign dependent on I/Q channel imbalance degree. The proposed method compensates the estimated I/Q channel imbalances by correlation values between the down-converted signal obtained by squaring the output signal itself using a simple mixer and the modified baseband signal. By comparing two signals after A/D conversion, the magnitude and sign of each type of imbalances can be determined separately and simultaneously. Based on the I/Q channel imbalance compensation, the spurious signals can be reduced by adjusting the gain and phase values of I or Q channel signal. The way to estimate the channel imbalances of the up-conversion mixer was presented and verified by using theoretical derivations and computer simulations.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1998.06a
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• pp.1133-1136
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• 1998

• Proceedings of the Korean Information Science Society Conference
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• 2002.04a
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• pp.37-39
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• 2002

컴퓨터의 보급과 통신의 발달에 따라 많은 자료가 모뎀 등의 장비를 통하여 네트워크 상에서 이동하고, 인간의 음성, 혹은 소리가 컴퓨터에 사용되게 되었다. 이에 따라 소리, 네트워크 상의 자료와 같은 아날로그 신호와 컴퓨터가 처리할 수 있는 디지털 신호간의 변환이 필요하게 되었다. 본 연구에서는 CCITT에서 제안한 아날로그, 디지털 변환 알고리즘인 ADPCM 알고리즘, G.721, G.726에 따라 아날로그, 디지털 변환기를 하드웨어 기술언어인 VHDL을 사용하여 실제적으로 구현하였다.

• Journal of the Institute of Convergence Signal Processing
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• v.9 no.1
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• pp.54-61
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• 2008

This paper presents a new TIQ based CMOS flash 6-bit ADC to process digital signal in real time. In order to improve the conversion speed of ADC by designing new logic or layout of ADC circuits, a new design method is proposed in encoding logic circuits. The proposed encoding circuits convert analog input into digitally encoded double base number system(DBNS), which uses two bases unlike the normal binary representation scheme. The DBNS adopts binary and ternary radix to enhance digital arithmetic processing capability. In the DBNS, the addition and multiplication can be processed with just shift operations only. Finding near canonical representation is the most important work in general DBNS. But the main disadvantage of DBNS representation in ADC is the fan-in problem. Thus, an equal distribution algorithm is developed to solve the fan-in problem after assignment the prime numbers first. The conversion speed of simulation result was 1.6 GSPS, at 1.8V power with the Magna $0.18{\mu}m$ CMOS process, and the maximum power consumption was 38.71mW.

• The Magazine of the IEIE
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• v.44 no.6
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• pp.32-41
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• 2017

• The Journal of the Acoustical Society of Korea
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• v.29 no.1
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• pp.24-33
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• 2010

This paper proposes a technique of sound beamforming that can generate high-directive sound beams, and this paper also presents applications of the proposed algorithm to multi-channel 3D sound systems. The proposed algorithm consists of two phases: first, optimum weights maximizing a sound pressure level ratio between the target and control acoustic regions are designed, and later, the directivity of the pre-designed sound beam is iteratively enhanced by modifying the covariance matrix. The proposed method was evaluated under various situations, and the results showed that it could provide more focused sound beams than the conventional methods.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.5
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• pp.333-340
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• 2003

Doppler processing is the heart of pulsed Doppler radar. It gives a clutter elimination and coherent integration. With the improvement of digital signal processors (DPSs), the implementation using them is more widely used in radar systems. Generally, so as for Doppler processor to process the input data in real time, a parallel processing concept using multiple DSPs should be used. This paper implements a programmable Doppler processor, which consists of MTI filter, DFB and square-law detector, using 8 ADSP21060s. Formulating the distribution time of the input data, the transfer time of the output data and the time required to compute each algorithm, it estimates total processing time and the number of required DSP. Finally, using the TSG that provides radar control pulses and simulated target signals, performances of the implemented Doppler processor are evaluated.

• Journal of the Institute of Convergence Signal Processing
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• v.1 no.2
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• pp.131-137
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• 2000

In this paper, as a compatible software radio transmission system, Digital-Radio conversion system which can directly change the digital signal generated by the logic circuit into radio signal is proposed. By the vector synthesis method, the digital signals can change directly into radio signal. If such a circuit is realized, RF circuit and an antenna can be composed by the simple one device, and the radio is directly controlled and performed by the software processing which is the essence of software radio. This Digital-Radio conversion system of this paper give many number of communication channels being offered by PN code and offer a hardware design flexibility by digitization, therefore it decrease the percentage ratio of hardware of system and give a more flexible function of software basis. In this paper, the principle of digital to radio signal generation algorithm is explained and the performance characteristics of proposed algorithm is shown in time base by the computer simulation method.

• Journal of Korea Multimedia Society
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• v.13 no.10
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• pp.1525-1533
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• 2010

With the digital terrestrial television broadcasting transition, terrestrial television broadcasting have required the replacement of retransmission facilities for the analog broadcasting installed in the existing apartment, building, cable TV station, MATV system and so on. In addition, new standards have been enacted for retransmission of the digital television broadcasting in MATV system. To deal with this issue, in this paper, we propose a new 8-VSB remodulator that can retransmit signals of the terrestrial digital television broadcasting. Moreover, we present a standard and the process composition of the 8-VSB remodulator, and an experimental environment configuration for performance evaluation. To achieve this, we have implemented the 8-VSB remodulator with the sequential process components comprised of the RF signal retransmission, the TS stream modulator, the RF signal reception and demodulation. Through the simulation, we analyze the performance standard from the measured data such as spurious and phase noise. And then, we measure SNR and EVM of each attenuation step of the signal obtained by the signal processor and the 8-VSB remodulator with the same retransmission environment and conditions. Experimental results show that both the 8-VSB remodulator and the signal processor can be used as equipment for the retransmission of the terrestrial digital television broadcasting. In addition, the 8-VSB remodulator performed well to improve the transmission efficiency for the digital broadcasting signal, compare to the existing signal processor.

• Journal of IKEEE
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• v.8 no.2 s.15
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• pp.166-171
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• 2004

This paper describes a CMOS time to digital converter (TDC) that measures the interval between two signals and converts to a digital signal. There are various methods to measure the time interval. But several architectures have a limitation in resolution and in conversion time. Moreover, they have complex algorithms. But the proposed TDC circuit has achieved a high resolution (25ps) by using a high-speed digital sampler and simple algorithm. The sampler detects when input signals comes into the TDC and output is coded. The proposed multiphase clock generator was also implemented to achieve 25p resolution.