• Journal of the Institute of Convergence Signal Processing
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• v.15 no.4
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• pp.135-140
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• 2014

As the digital image devices are widely used, interests in the software- and the hardware-related image processing become higher and the image processing techniques are applied in various fields such as object recognition, object detection, fingerprint recognition, and etc. For the edge detections Sobel, Prewitt, Laplacian, Roberts and Canny detectors are used and these existing methods can excellently detect the edges of the images without noise. However, in the images corrupted by the impulse noise, these methods are insufficent in noise elimination characteristics, showing unsatisfactory edge detection. Therefore in this paper, in order to obtain excellent edge detection characteristics in the corrupted image by the impulse noise, an detection algorithm is porposed, which uses the central pixel of mask divided by four regions along the axis, calculates the estimated mask according to the representing pixel values in each regions, and detects the final edges by applying the estimates mask and the new directional one.

• Journal of the Korean Society for Nondestructive Testing
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• v.31 no.5
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• pp.552-559
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• 2011

Recently, the eddy current testing(ECT), alternating current field testing, magnetic flux leakage testing and remote field testing have been used as a nondestructive evaluation method based on the electromagnetic induction phenomenon. The eddy current testing is now widely accepted as a NDE method for the heat exchanger tube in the electric power industry, chemical, shipbuilding, and military. The ECT system mainly consists of the synthesizer module, analog module, analog-to-digital converter, power supplier, and data acquisition and analysis program. In the previous study, the synthesizer module and the analog module which is essential to the ECT system were primarily developed, and in this study the data acquisition and analysis program were developed. The operation system for this program is based on the Windows 7, and optimized for the Korean users, and the specific feature of this program using setup wizard enables inspector to make a setup easily for acquisition and analysis of ECT data. In this paper, the configuration and functions of eddy current data acquisition and analysis program will be introduced.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.9
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• pp.48-53
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• 2007

Some digital signal processing applications, such as FFT, request multiplications with a group(or, groups) of a few predetermined coefficients. In this paper, based on the modified CSD algorithm, an efficient multiplier design method for predetermined coefficient groups is proposed. In the multiplier design for sine-cosine generator used in direct digital frequency synthesizer(DDFS), and in the multiplier design used in 128 point $radix-2^4$ FFT, it is shown that the area, power and delay time can be reduced up to 34%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.7B
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• pp.1081-1090
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• 2010

$0.18{\mu}m$ CMOS UHF RFID tag frontend is presented in this paper. Several key components are highlighted: the voltage multiplier based on the threshold voltage terminated circuit, the demodulator using current mode, and the clock generator. For standard compliance, all designed components are under the EPC Global Class-1 Generation-2 UHF RFID protocol. Backscatter modulation uses the pulse width modulation scheme. Overall performance of the proposed tag chip was verified with the evaluation board. Prototype Tag Chip dimension is neary 0.77mm2 ; According to the simulation results, the reader can successfully interrogate the tag within 1.5m. where the tag consumes the power about $71{\mu}W$.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.6
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• pp.271-278
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• 2004

In this paper, we propose a content-based audio genre classification algorithm that automatically classifies the query audio into five genres such as Classic, Hiphop, Jazz, Rock, Speech using digital sign processing approach. From the 20 seconds query audio file, the audio signal is segmented into 23ms frame with non-overlapped hamming window and 54 dimensional feature vectors, including Spectral Centroid, Rolloff, Flux, LPC, MFCC, is extracted from each query audio. For the classification algorithm, k-NN, Gaussian, GMM classifier is used. In order to choose optimum features from the 54 dimension feature vectors, SFS(Sequential Forward Selection) method is applied to draw 10 dimension optimum features and these are used for the genre classification algorithm. From the experimental result, we can verify the superior performance of the proposed method that provides near 90% success rate for the genre classification which means 10%∼20% improvements over the previous methods. For the case of actual user system environment, feature vector is extracted from the random interval of the query audio and it shows overall 80% success rate except extreme cases of beginning and ending portion of the query audio file.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.44 no.5
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• pp.12-19
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• 2007

This paper presents an ASIP(Application Specific Instruction Set Processor) for implementation of H.264/AVC, called VSIP(Video Specific Instruction-set Processor). The proposed VSIP has novel instructions and optimized hardware architectures for specific applications, such as intra prediction, in-loop deblocking filter, integer transform, etc. Moreover, VSIP has hardware accelerators for computation intensive parts in video signal processing, such as inter prediction and entropy coding. The VSIP has much smaller area and can dramatically reduce the number of memory access compared with commercial DSP chips, which result in low power consumption. The proposed VSIP can efficiently perform in real-time video processing and it can support various profiles and standards.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.11
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• pp.21-30
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• 1998

In this paper, a digital current control system using a FPGA(Field Programmable Gate Array) was implemented, and the system was applied to an induction motor widely used as an industrial driving machine. The FPGA designed by VHDL(VHSIC Hardware Description Language) consists of a PWM(Pulse Width Modulation) generation block, a PWM protection block, a speed measuring block, a watch dog timer block, an interrupt control block, a decoder logic block, a wait control block and digital input and output blocks respectively. Dedicated clock inputs on the FPGA were used for high-speed execution, and an up-down counter and a latch block were designed in parallel, in order that the triangle wave could be operated at 40 MHz clock. When triangle wave is compared with many registers respectively, gate delay occurs from excessive fan-outs. To reduce the delay, two triangle wave registers were implemented in parallel. Amplitude and frequency of the triangle wave, and dead time of PWM could be changed by software. This FPGA was synthesized by pASIC 2SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package was applied to digital current control system for 3-phase induction motor. The digital current control system of the 3 phase induction motor was configured using the DSP(TMS320C31-40 MHz), FPGA, A/D converter and Hall CT etc., and experimental results showed the effectiveness of the digital current control system.

• Journal of the Korea Convergence Society
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• v.8 no.7
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• pp.1-6
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• 2017

This paper presents the design of a frequency measurement device using ADC, EP2AGX FPGA and STM32 processor to accurately measure the frequency of a broadband high frequency signal. The ADC device used in this paper has a sampling frequency of 250 MSPS and a processing frequency bandwidth of 100 MHz. Due to its high sampling frequency, it is difficult to process in ordinary computers or processors, so we implemented the frequency measurement algorithm using the Altra EP2AGX FPGA. The measured frequency is sent to the direction detection controller in real time and fused with the phase signal to calculate the incident azimuth angle of the high frequency signal. The designed frequency measurement device is about 0.2 Mhz in frequency measurement error and 30% less than Anaren DFD-x, which is considered to contribute greatly to the design of radio monitoring and direction detection device.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.3
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• pp.132-139
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• 2016

In the bandpass sampling(BPS), the sampling frequency for the analog-to-digital converter is lower than that of the signal to be sampled. Since the BPS operation results in the signal spectrum to be copied on the baseband, it is possible for the frequency down-converter to be conveniently omitted. The second-order BPS system is introduced in order to cancel the aliased interference components from the BPS output that may be generated by the BPS processing. In this paper, we introduce a design method for the optimal phase of the interpolant filter in the second-order BPS system which enables to maximally cancel the aliased components. Being mathematically derived, this method can always be applied independently to the spectral characteristics of the BPS input signal. The performance improvements by the suggested method has been measured statistically with various power spectra of the received signal, and it has been shown that the maximal amount of the improvements reaches up to 5~20 [dB] in comparison with the previous suboptimal algorithm.

• Journal of Biomedical Engineering Research
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• v.25 no.2
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• pp.137-144
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• 2004

ECG signals are often contaminated with high-frequency noise such as muscle artifact, power line interference, and others. In the ECG signal processing, especially during a pre-processing stage, numerous noise removal techniques have been used to reduce these high-frequency noise without much distorting the original signal. This paper proposes a new type of digital filter with a continuously variable cutoff frequency to improve the signal quality This filter consists of a cutoff frequency controller (CFC) and variable cutoff frequency lowpass filter (VCF-LPF). From the noisy input ECG signal, CFC produces a cutoff frequency control signal using the signal slew rate. We implemented VCF-LPF based on two new filter design methods called convex combination filter (CCF) and weight interpolation fille. (WIF). These two methods allow us to change the cutoff frequency of a lowpass filter In an arbitrary fine step. VCF-LPF shows an excellent noise reduction capability for the entire time segment of ECG excluding the rising and falling edge of a very sharp QRS complex. We found VCF-LPF very useful and practical for better signal visualization and probably for better ECG interpretation. We expect this new digital filter will find its applications especially in a home health management system where the measured ECG signals are easily contaminated with high-frequency noises .