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Modified CSD Group Multiplier Design for Predetermined Coefficient Groups  

Kim, Yong-Eun (Div. of Electronic & Information Engineering Chonbuk University)
Xu, Yi-Nan (Div. of Electronic & Information Engineering Chonbuk University)
Chung, Jin-Gyun (Div. of Electronic & Information Engineering Chonbuk University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.44, no.9, 2007 , pp. 48-53 More about this Journal
Abstract
Some digital signal processing applications, such as FFT, request multiplications with a group(or, groups) of a few predetermined coefficients. In this paper, based on the modified CSD algorithm, an efficient multiplier design method for predetermined coefficient groups is proposed. In the multiplier design for sine-cosine generator used in direct digital frequency synthesizer(DDFS), and in the multiplier design used in 128 point $radix-2^4$ FFT, it is shown that the area, power and delay time can be reduced up to 34%.
Keywords
Group Multiplier; Modified CSD; FFT; DDFS;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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