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ASIP Design for Real-Time Processing of H.264  

Kim, Jin-Soo (Department of Electrical Engineering, Ajou University)
SunWoo, Myung-Hoon (Department of Electrical Engineering, Ajou University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea CI / v.44, no.5, 2007 , pp. 12-19 More about this Journal
Abstract
This paper presents an ASIP(Application Specific Instruction Set Processor) for implementation of H.264/AVC, called VSIP(Video Specific Instruction-set Processor). The proposed VSIP has novel instructions and optimized hardware architectures for specific applications, such as intra prediction, in-loop deblocking filter, integer transform, etc. Moreover, VSIP has hardware accelerators for computation intensive parts in video signal processing, such as inter prediction and entropy coding. The VSIP has much smaller area and can dramatically reduce the number of memory access compared with commercial DSP chips, which result in low power consumption. The proposed VSIP can efficiently perform in real-time video processing and it can support various profiles and standards.
Keywords
ASIP(Application Specific Instruction-set Processor); HW/SW co-design; H.264/AVC; low power design; hardware accelerator;
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