• Journal of Advanced Navigation Technology
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• v.12 no.3
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• pp.220-226
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• 2008

This paper proposes the Reconfigurable Doherty Amplifier(RDA) with asymmetric structure which has ${\lambda}/4$ impedance transformer for modulating the load impedance in peaking amplifier path. This structure is possible to implement a compact size for N-stage multi Doherty amplifier and to get almost same characteristics that is compared to conventional Doherty amplifier. To realize the high efficiency amplifier, we were implemented 45 Watts power amplifier at transmitter band of Wideband Code Division Multiple Access(WCDMA) base-station. As a result, in case of WCDMA 1 Frequency Allocation(FA) input signals, this amplifier has obtained a 26.3% Power Added Efficiency(PAE) at 8 dB back-off point from P1dB and an Adjacent Channel Leakage Power(ACLR) is -40.4 dBc at center frequency ${\pm}5MHz$ deviation.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.9
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• pp.55-59
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• 2008

In this paper, the linearity of Doherty amplifier has been improved by applying a compact slow-wave microstrip branch-line coupler on the output of Doherty amplifier. The proposed branch coupler has four microstrip high-low impedance resonant cells periodically placed inside the branch-line coupler to result in high slow-wave effect. The new coupler not only effectively reduces the occupied area to 30% of the conventional branch-line coupler at 1.8GHz, but also has high second harmonic suppression performance. We obtained the 3rd-order intermodulation distortion ($IMD_3$) of -31.16 dBc for CDMA applications with that of maintaining the constant power added efficiency (PAE). The IMD3 performance is improved as much as -7 dBc compared with a Doherty amplifier.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.6 s.109
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• pp.538-545
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• 2006

In this paper, an asymmetric high power extended Doherty amplifier for WCDMA base-station applications is presented. The amplifier has an extended peak efficiency over 9 dB of output power and a linear dynamic range characteristic. To realize the peak efficiency extension and linear dynamic range characteristic, a two times larger peaking device compared to the main device, and an unequal power divider are used. From the experimental results of 1FA WCDMA signal, this amplifier has an efficiency of 31 % and an ACLR of -35 dBc is achieved at 9 dB back-off from P1 dB.

• Journal of Advanced Navigation Technology
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• v.18 no.3
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• pp.229-235
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• 2014

This paper presents the Doherty power amplifier with a digitally controlled analog predistorter circuit of Scintera Corp. to produce high power efficiency and high linearity performance. The analog predistorter improves the linearity performance because of controlling amplitude and phase values of input signal in order to improve intermodulation performance of power amplifier. Also, the power amplifier is designed by the Doherty technology to obtain the high efficiency performance. To validate the Scintera's analog predistorter, we are implemented the power amplifier with Doherty method at center frequency 2150 MHz. Compared with the balanced amplifier, the power amplifier is improved above 11% enhanced efficiency and more than 15 dB ACPR improvement.

• 한국ITS학회:학술대회논문집
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• 2008.11a
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• pp.602-606
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• 2008

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.2
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• pp.76-80
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• 2007

In this paper, the PAE (Power Added Efficiency) and the linearity of the Doherty amplifier has been improved using dual bias control and PBG (Photonic BandGap) structure. The PBG structure has used to implement on output matching circuit and dual bias control has applied to improve the PAE of the Doherty amplifier at a low input level by applying it to a carrier amplifier. The Doherty amplifier using the proposed structure has improved PAE by 8% and 5dBc of IMD3 (3rd Inter-Modulation Distortion) compared with those of the conventional class AB amplifier. In addition to, it has been evident that the designed the structure has showed more than a 30% increase in PAE for flatness over all input power level.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.8 s.111
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• pp.707-712
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• 2006

In this paper, dual bias control circuit and PBG(Photonic BandGap) structure have been employed to improve PAE(Power Added Effciency) of the Doherty amplifier on Input power level. The gate and drain bias voltage has been controlled with the envelope of the input RF signal and PBG structure has been employed on the output port of Doherty amplifier. The proposed Doherty amplifier using dual bias controlled circuit and PBG has been improved the average PAE by 8%, $IMD_3$ by -5 dBc. And proposed Doherty amplifier has a high efficiency more than 30% on overall input power level, respectively.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.1
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• pp.13-20
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• 2015

Existing LDMOS power amplifier that used class-AB and doherty system shows 55% of efficiency in 60MHz narrow band. Because RRH has been applied to power amplifier at base station. It is required that over 100MHz expanded band and more than 60% high efficiency power amplifier. In this paper we designed class-J power amplifier using LDMOS FET which has over 60% high efficiency characteristic in 200MHz. The output matching circuit of designed class-J power amplifier has been optimized to contain pure reactance at second harmonic load and has low quality factor Q. As a measurement result of the amplifier, when we input continuous wave signal, we checked 62~70% of power added efficiency(PAE) in 2.06~2.2GHz including WCDMA frequency as a 10W class-J power amplifier.

• Journal of Advanced Navigation Technology
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• v.27 no.2
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• pp.197-202
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• 2023

This paper presents the design method and electrical characteristics of a high-efficiency power amplifier for a 50 Watts class repeater applied to a 5G system and used in in-building, subway, and tunnel. GaN was used for the termination transistor of the power amplifier designed here, and intermodulation signals were removed using DPD to satisfy linearity. In addition, in order to handle various requirements such as amplifier gain control and alarm processing required in the 5G system, the microprocessor is designed to exist inside the power amplifier. The amplifier manufactured to confirm the electrical performance of the power amplifier satisfying these conditions satisfied 46.5 dBm and the overall efficiency of the amplifier was 37%, and it was confirmed that it satisfied various alarm conditions and electrical characteristics required by telecommunication companies.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.5
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• pp.2241-2248
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• 2011

This paper describes the design of a palette-type 60watt high power amplifier module using gallium nitride(GaN) devices with high power and efficiency performances for WiMAX and LTE systems. The line-up for the high gain amplifier module consists of the pre-amplifier stage with low power and high gain, 8watt GaN driving amplifier stage, and 60watt GaN high power amplifier stage of Doherty structure with two 30watt GaN devices. The obtained gain is 61.4dB with an excellent gain flatness of ${\pm}$0.075dB over 2.5~2.68GHz. GaN devices and the Doherty structure are adopted for the improvement of high efficiency and output power. The measurement for the fabricated high power amplifier module of palette type is performed using the widely known WiMAX signal all over the world. In the example of RRH(remote radio head) application of the fabricated amplifier module, the measured efficiency is 37~38% with the 10watts of modulated output power. It is shown that when the fabricated amplifier module is activated with a digital predistorter(DPD), the measured ACLR is better than 46dBc under the 10watts of modulated output power.