• Journal of the Korea Society of Computer and Information
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• v.19 no.10
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• pp.1-12
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• 2014

This paper implements and improves the performance of high computational subtractive clustering algorithm using a single instruction, multiple data (SIMD) based many-core processor. In addition, this paper implements five different processing element (PE) architectures (PEs=16, 64, 256, 1,024, 4,096) to select an optimal PE architecture for the subtractive clustering algorithm by estimating execution time and energy efficiency. Experimental results using two different medical images and three different resolutions ($128{\times}128$, $256{\times}256$, $512{\times}512$) show that PEs=4,096 achieves the highest performance and energy efficiency for all the cases.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.38 no.5
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• pp.509-517
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• 2001

Full-search algorithm requires large amount of computation which causes time delay or very complex hardware architecture for real time implementation. In this paper, we propose a fast motion estimator based on bit-plane matching, which reduce the computational complexity and the hardware cost. In the proposed motion estimator, the conventional motion estimation algorithms are applied to the binary images directly extracted from the video sequence. Furthermore, in the proposed VLSI motion estimator, we employ a Pair of processing cores that calculate the motion vector continuously By controlling the data flow in a systolic fashion using the internal shift registers in the processing cores, we avoid using SRAM (local memory) so that we remove the time overhead for accessing the local memory and adopt lower-cost fabrication technology. We modeled and tested the proposed motion estimator in VHDL, and then synthesized the whole system which has been integrated in a 0.6-$\mu$m triple-metal CMOS chip of size 8.15 X 10.84$\textrm{mm}^2$.

• Journal of KIISE
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• v.41 no.11
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• pp.958-966
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• 2014

Wireless sensor networks offer a distributed processing environment. Many sensor nodes are deployed in fields that have limited resources such as computing power, network bandwidth, and electric power. The sensor nodes construct their own networks automatically, and the collected data are sent to the sink node. In these traditional wireless sensor networks, network congestion due to packet flooding through the networks shortens the network life time. Clustering or in-network technologies help reduce packet flooding in the networks. Many studies have been focused on saving energy in the sensor nodes because the limited available power leads to an important problem of extending the operation of sensor networks as long as possible. However, we focus on the execution time because clustering and local distributed processing already contribute to saving energy by local decision-making. In this paper, we present a cooperative processing model based on the processing timeline. Our processing model includes validation of the processing, prediction of the total execution time, and determination of the optimal number of processing nodes for distributed processing in wireless sensor networks. The experiments demonstrate the accuracy of the proposed model, and a case study shows that our model can be used for the distributed application.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.266-271
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• 1999

The purpose in this study has to development the system on increasing operation of old-typed transceiver for solve the question that limited allocation frequencies and continuesly icreasment of traffic. Therefore, we are desigened the remote control system that has the function for variable channels, PTT and monitoring of transmission power and frequencies. Exchange of control data is to hold in common the twist two-wire or telephone line for the voice transmission. The H/W is consist of FSK and MCS-51 processor which are up-down control of channel, n control and monitoring display by serial data transmission. According to the simplex traffic operation is designed the algorithm of serial data transmission by sequential transmission sequence and protocol. The S/W of sequential transmission sequence is designed to usefully the intergrated communications system which is able to connection between the multi-transceiver and multi-terminal by master processor.

• The KIPS Transactions:PartD
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• v.18D no.1
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• pp.67-80
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• 2011

On an automated business document processing system maintaining financial data, errors on query based retrieval of numbers are critical to overall performance and usability of the system. Automatic spelling correction methods have been emerged and have played important role in development of information retrieval system. However scope of the methods was limited to the symbols, for example alphabetic letter strings, which can be reserved in the form of trainable templates or custom dictionary. On the other hand, numbers, a sequence of digits, are not the objects that can be reserved into a dictionary but a pure markov sequence. In this paper we proposed a new OCR model for spelling correction for numbers using the multiple streams and the context based correction on top of probabilistic information retrieval framework. We implemented the proposed error correction model as a sub-module and integrated into an existing automated invoice document processing system. We also presented the comparative test results that indicated significant enhancement of overall precision of the system by our model.

• KIPS Transactions on Software and Data Engineering
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• v.6 no.6
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• pp.293-302
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• 2017

This paper proposes a method that generates test cases from Simulink/Stateflow(SL/SF) using a SMT (Satisfiability Modulo Theory) solver, Yices and information of SL/SF model. The most difficult problem to generate test cases from SL/SF model is to solve reachability problem. In the propose method, Yices and the tables built with the model information are utilized to solve the reachability problem. The method utilizes the SMT model, that is the SL/SF model transformed in Yices. The tables built from SL/SF are used for backward processing of the proposed method and increases test generation efficiency. A commercial refrigerator model and two car ECU (Electrical Control Unit) models are used to evaluate the performance of the proposed algorithm..

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.2
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• pp.202-208
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• 2016

In this study, the defect in connection with a C-tray was inspected using a low-cost camera. The four test items were the device overlapping in the tray, the bending of the tray, the loaded quantity of the tray, and the device pocket leaving, an algorithm was developed for defining and detecting the above defect types. Therefore, the developed handling system could extend the application of the stack of the c-tray and provide a quantity verification inspection on the packing processing. The machine operation control program, which can ensure the optimal inspection image to match the scan speed, was developed and the control program that can process the user gui and the vision image utilizing the control was developed. Overall, a mechanical system that is practicable for obtaining an image and processing the vision data was designed.

• Journal of the Institute of Convergence Signal Processing
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• v.13 no.1
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• pp.50-55
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• 2012

This paper proposes an optima] many-core processor architecture that meets the requirements of low power and high performance for different ultrasonic image resolutions in hand-held ultrasonic devices. To identify the optimal many-core architecture, seven different PE configurations are simulated for processing ultrasonic images in terms of execution performance and energy consumption. Experimental results indicate that the highest energy efficiencies are achieved at PEs=1,024, 64, and 256 for ultrasonic images at $256{\times}256$, $320{\times}240$, and $800{\times}480$ resolutions, respectively. In addition, the maximum area efficiencies are obtained at PEs=256 (for $256{\times}256$ and $800{\times}480$ image resolutions) and 64 (for $320{\times}240$ image resolution).

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.6C
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• pp.637-644
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• 2006

This paper presents performance and implementation comparisons of standard and fast DCT algorithms that are commonly used for subband filter bank in MPEG audio coders. The comparison is made according to the architectural difference of the implementation hardware. Fast DCT algorithms are known to have much less computational complexity than the standard method that involves computing a vector dot product of cosine coefficient. But, due to structural irregularity, fast DCT algorithms require extra cycles to generate the addresses for operands and to realign interim data. When algorithms are implemented using DSP processors that provide special operations such as single-cycle MAC (multiply-accumulate), zero-overhead nested loop, the standard algorithm is more advantageous than the fast algorithms. Also, in case of the finite-precision processing, the error performance of the standard method is far superior to that of the fast algorithms. In this paper, truncation errors and algorithmic suitability are analyzed and implementation results are provided to support the analysis.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.518-518
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• 2008

We propose an optical-based measuring instrument of catenary system in electric railway. This system was made to utilize line scan camera as inspecting system to measure the stagger and height of overhead contact wire in railway and composed with optical type source and FPGA-based image acquisition system with PCI slot. Vision acquisition software has been used for the application to programming interface for image acquisition, display, and storage with a frequency of sampling. The proposed optical-based measuring instrument to measure the contact wire geometry shows promising on-field applications for online condition motoring. Also, this system can be applied to measure the hight and stagger or other geometry of different type of overhead catenary system.