• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.2
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• pp.28-37
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• 2017

Multipath TCP (MPTCP), which is a layer 4 protocol that can get the reliability and the efficiency of the transmission by using multipath transfer, was standardized by the IETF. MPTCP provides superior performance when compared to a single TCP when used in a homogeneous network with similar network characteristics. However, MPTCP degrades performance when used in heterogeneous networks with different network characteristics. In this paper, we propose 'Delay-alerted path-blocking scheduler'. It measures the delay of each path and blocks the path with a long delay to reduce the order of packets in the receive buffer. If the duplicated packet is sent to the blocked path to measure the delay and the congestion on the blocking path is reduced, the blocked path is unblocked. For performance analysis, the proposed scheduler was implemented in the Linux kernel and improved performance was obtained in the test bed. We also confirmed that the proposed scheduler reduces the degradation of MPTCP performance in real wireless networks with heterogeneous path characteristics.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.4
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• pp.1-8
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• 2000

A defect of decrease in TCP throughput can be investigated in asymmetric environment of different uplink and downlink bandwidths. Under two-way TCP traffic, the total link utilization is decreased by the successive injection of data packets in buffer. To solve these problems, terminal ACK filtering and packet scheduling mechanisms are introduced in this paper. ACK filtering eliminates the buffered ACK packets and transmits recent ACK packets in the uplink with limited bandwidth. Packet scheduling is the method of preventing 'clustering' and 'ack compression' states which are generated in the two-way TCP traffic. The guarantee of the data traffic in reverse TCP connection and the high throughput in forward TCP connection are investigated by simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.1
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• pp.20-27
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• 2010

This paper describes a design of 5-stage pipelined de-blocking filter with power reduction scheme and proposes a efficient memory architecture and filter order for high performance H.264/AVC Decoder. Generally the de-blocking filter removes block boundary artifacts and enhances image quality. Nevertheless filter has a few disadvantage that it requires a number of memory access and iterated operations because of filter operation for 4 time to one edge. So this paper proposes a optimized filter ordering and efficient hardware architecture for the reduction of memory access and total filter cycles. In proposed filter parallel processing is available because of structured 5-stage pipeline consisted of memory read, threshold decider, pre-calculation, filter operation and write back. Also it can reduce power consumption because it uses a clock gating scheme which disable unnecessary clock switching. Besides total number of filtering cycle is decreased by new filter order. The proposed filter is designed with Verilog-HDL and functionally verified with the whole H.264/AVC decoder using the Modelsim 6.2g simulator. Input vectors are QCIF images generated by JM9.4 standard encoder software. As a result of experiment, it shows that the filter can make about 20% total filter cycles reduction and it requires small transposition buffer size.

• Journal of the Korean Vacuum Society
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• v.18 no.3
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• pp.213-220
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• 2009

The optimal condition of low temperature deposition of transparent conductive Al-doped zinc oxide (AZO) films is studied by RF magnetron sputtering method. To achieve enhanced-electrical property and good crystallites quality, we tried to deposit on glass using a two-step growth process. This process was to deposit AZO buffer layer with optimal growth condition on glass in-situ state. The AZO film grown at rf 120 W on buffer layer prepared at RF $50{\sim}60\;W$ shows the electrical resistivity $3.9{\times}10^{-4}{\Omega}cm$, Carrier concentration $1.22{\times}10^{21}/cm^3$, and mobility $9.9\;cm^2/Vs$ in these results, The crystallinity of AZO film on buffer layer was similar to that of AZO film on glass with no buffer later but the electrical properties of the AZO film were 30% improved than that of the AZO film with no buffer layer. Therefore, the cause of enhanced electrical properties was explained to be dependent on degree of crystallization and on buffer layer's compressive stress by variation of $Ar^+$ ion impinging energy.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.6A
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• pp.893-899
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• 2000

WDM technology has been an emerging issue for the efficient use of optical links. WDM uses a number of different wavelengths that are assigned to each channel. The minimal number of optical transcievers and receivers should be used in a node to build an economic WDM transmission system without degrading system performance. Hence, the analysis of performance parameters such as throughput and delay is important to guarantee the WDM system performance. In this paper, the performance of a MAC protocol on a slotted WDM system that has a tunable transmitter(TTX), a tunable receiver(TRX), and a fixed receiver(FRX), respectively, on each node, was statistically analyzed. The computer simulation validates the performance analysis.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.8
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• pp.63-72
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• 2012

In this paper, we proposed a parallel architecture of line & block edge filter for high-performance H.264/AVC deblocking filter for Quad Full High Definition(Quad FHD) video real time processing. To improve throughput, we designed 4-parallel block edge filter with 16 line edge filter. To reduce internal buffer size and processing cycle, we scheduled 4-parallel zig-zag scan order as deblocking filtering order. To avoid data conflicts we placed 1 delay cycle between block edge filtering. We implemented interleaving buffer, as internal buffer of block edge filter, to sharing buffer for reducing buffer size. The proposed architecture was simulated in 0.18um standard cell library. The maximum operation frequency is 108MHz. The gate count is 140.16Kgates. The proposed H.264/AVC deblocking filter can support Quad FHD at 113.17 frames per second by running at 90MHz.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.5
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• pp.87-97
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• 2016

This work proposes a time-shared 10b DAC based on a two-step resistor string to minimize the effective area of a DAC channel for driving each AMOLED display column. The proposed DAC shows a lower effective DAC area per unit column driver and a faster conversion speed than the conventional DACs by employing a time-shared DEMUX and a ROM-based two-step decoder of 6b and 4b in the first and second resistor string. In the second-stage 4b floating resistor string, a simple current source rather than a unity-gain buffer decreases the loading effect and chip area of a DAC channel and eliminates offset mismatch between channels caused by buffer amplifiers. The proposed 1-to-24 DEMUX enables a single DAC channel to drive 24 columns sequentially with a single-phase clock and a 5b binary counter. A 0.9pF sampling capacitor and a small-sized source follower in the input stage of each column-driving buffer amplifier decrease the effect due to channel charge injection and improve the output settling accuracy of the buffer amplifier while using the top-plate sampling scheme in the proposed DAC. The proposed DAC in a $0.18{\mu}m$ CMOS shows a signal settling time of 62.5ns during code transitions from '$000_{16}$' to '$3FF_{16}$'. The prototype DAC occupies a unit channel area of $0.058mm^2$ and an effective unit channel area of $0.002mm^2$ while consuming 6.08mW with analog and digital power supplies of 3.3V and 1.8V, respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.619-621
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• 2013

This paper is proposing a real-time audio processing system for TCP/IP with server-client. The server sends the audio data packet which is the same size each time while playing the audio data. And the client plays the received audio data from the server. In general, The receiving speed of audio data packet is faster than processing the audio data. So, the unstable playback is occurred when playing the received audio data at the moment. In order to overcome this problem, the double buffering method is proposed.

• Journal of Korea Multimedia Society
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• v.5 no.6
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• pp.697-703
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• 2002

In this paper, we propose the adaptive multi stream transmission technique based on SPIHT video signal for the highest quality service over the current Internet that does not guarantee QoS. In addition to the reliable transmission of the video stream over the asynchronous packet network, the proposed approach provides the transmission using the adaptive frame pattern control and multi steam over the TCP for continuous replay. The adaptive frame pattern control makes the transmission date scalable in accordance with the client's buffer status. Apart from this, the multi stream transmission improves the efficiency of video stream, and is robust to the network jitter problem, and maximally utilizes the bandwidth of the client's. As a result of the experiment, the DR(delay ratio) in the proposed adaptive multi-stream transmission is more close to zero than in the existing signal stream transmission, which enables the best-efforts service to be implemented.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.6
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• pp.583-591
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• 2000

Caching mechanisms have been studied extensively to buffer the speed gap of hierarchical storages in the context of cache memory, paging system, and buffer management system. As the wide-area distributed environments such as the WWW extend broadly, caching of remote objects becomes more and more important. In the wide-area distributed environments, the cost and the benefit of caching an object is not uniform due to the location of the object; which should be considered in the cache replacement algorithms. For online operation, the time complexity of the replacement algorithm should not be excessive. To date, most replacement algorithms for the wide-area distributed environments do not meet both the non-uniformity of objects and the time complexity constraint. This paper proposes a replacement algorithm which considers the non-uniformity of objects properly; it also allows for an efficient implementation. Trace-driven simulations show that proposed algorithm outperforms existing replacement algorithms.