• Title/Summary/Keyword: 누설손실

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Numerical Analysis of a Tip Leakage Vortex in an Axial Flow Fan (축류홴 익단누설와류의 수치적 해석)

  • Jang, Choon-Man;Kim, Kwang-Yong
    • The KSFM Journal of Fluid Machinery
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    • v.7 no.1 s.22
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    • pp.36-44
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    • 2004
  • Three-dimensional vortical flow and separated flow topology near the casing wall in an axial flow fan having two different tip clearances have been investigated by a Reynolds-averaged Navier-Stokes (RANS) flow simulation. The simulation shows that the tip leakage vortex formed close to the leading edge of the blade tip on suction side grows in the streamwise direction. On the casing wall, a separation line is formed upstream of the leakage vortex center due to the interference between the leakage vortex and main flow. The reverse flow is observed between the separation line and the attachment line generated downstream of the trailing edge, and increased with enlarging tip clearance. The patterns of a leakage velocity vector including a leakage flow rate are also analyzed according to two tip clearances. It is noted that the understanding of the distribution of a limiting streamline on the casing wall is very important to grasp the characteristics of the vortical flow in the axial flow fan.

Study on Numerical Model of Leakage Flow at Gap between Compartments in a Building (건축물 구획실간 틈새에서의 누설유동에 대한 수치모델 연구)

  • Kim, Jung-Yup;Kim, Ji-Seok
    • Korean Journal of Air-Conditioning and Refrigeration Engineering
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    • v.25 no.10
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    • pp.562-567
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    • 2013
  • 1D-numerical analysis of the network algorithm with the orifice equation for the relationship between pressure difference and flowrate has been mostly used to analyse leakage flow at the gap. In this study, a 3D-numerical method applying momentum loss model to the gap region in the computational domain is represented to reflect effectively the effect of leakage flow by determining the proportion of pressure difference to air passage velocity. While the 3D-numerical method is verified through the computation of the two compartments model, the numerical analysis of the stack effect in a building stairway is performed. As the temperature of air outside drops, the pressure in the upper stairway and leakage flowrate through the gap in the door rise. The change of gap area does not have an effect on pressure in the stairway for the analysis conditions.

A Study on the As-Built Leakage Diagnosis of Main Steam Drain Valves for Nuclear Power Plants by Multi-measuring Technique (다중계측기법을 이용한 원전 주증기배수밸브의 현상태 누설진단에 관한 연구)

  • Kim, Sung-Young;Kim, Young-Bum;Kim, Do-Hyeong;Lee, Sang-Gok
    • Proceedings of the KSME Conference
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    • 2008.11b
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    • pp.2606-2611
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    • 2008
  • The high energy fluid leakage from the high temperature and high differential pressure drop system of NPPs (Nuclear Power Plants) decreases efficiency and consequently leads to considerable economic loss due to less power production. Also, the leakage possibly damages critical parts of components such as valve and trim with the effect of cavitation, flashing, and erosion, etc. and deteriorates its performance. Thus, in this study, we diagnosed the as-is leakage for four (4) main steam drain valves and two (2) steam traps of Yonggwang 1,2 units during normal operation by using multi-measuring technique and observed the occurrence of fine leakage. In the course of measuring fluid leakage, the sign of fine leakage is estimated to be the leakage from orifice. By converting the leakage to energy loss, it is equivalent to the amount of several hundred thousand won per each unit, which supports the basis for the justification of fine leakage.

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Design and Fabrication of Ka-Band Active PIN Diode Limiter for a Millimeter Wave Seeker (밀리미터파 탐색기용 Ka 대역 능동 PIN 다이오드 리미터 설계 및 제작)

  • Yang, Seong-Sik;Lim, Ju-Hyun;Na, Young-Jin
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.2
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    • pp.220-228
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    • 2012
  • In this paper, we explained the design technique about Ka-band active limiter for protecting the receiver of a millimeter wave seeker. To implement low flat leakage power, we proposed the control circuit of active limiter to control limiter voltage with PRF(Pulse Repetition Frequency) signal and input power. This active limiter consisted of the conventional 2 stage passive limiter, a feedback circuit with a directional coupler, detector, non-inverting amplifier and over-current protection resistance. As the test result of the fabricated Ka-band limiter, it had 1 GHz bandwidth, 3.5 dB insertion loss at the small input power and -7.5 dBm flat leakage at the 4 W RF input power, respectively.

Effect of Sintering Time on Degradation Characteristics of ZPCCY-Based Varistors (ZPCCY계 바리스터의 열화특성에 미치는 소결시간의 영향)

  • 남춘우;박종아
    • Journal of the Korean Ceramic Society
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    • v.41 no.6
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    • pp.464-470
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    • 2004
  • The electrical stability of ZPCCY-based varistors composing of ZnO-Pr$_{6}$O$_{11}$-CoO-C $r_2$ $O_3$- $Y_2$ $O_3$ ceramics were investigated in various DC accelerated aging stress with sintering times. Sintering time greatly affected electrical properties and stability. Sintering time decreased nonlinear exponent in the range of 51.2∼23.8 and increased leakage current in the range of 1.3∼5.6 ${\mu}$A. The varistor sintered for 1 h exhibited high nonlinearity, whereas relatively low stability. On the contrary, the varistor sintered for 3 h exhibited low nonlinearity, whereas relatively high stability. But the varistor sintered for 2 h exhibited not only good nonlinearity, with nonlinear exponent of 38.6 and leakage current of 3.6 ${\mu}$A but also high stability, in which the variation rates of varistor voltage, nonlinear exponent, leakage current, and dissipation factor are -0.80%, -1.81 %, +74.4%, and +0.88%, respectively.

Electrical Properties of 18[kV] ZnO Surge Arrester Stressed by the Mixed DC and 60[Hz] AC Voltages (직류+60[Hz]교류 중첩전압에 대한 18[kV] ZnO 피뢰기의 전기적 특성)

  • Lee, Su-Bong;Lee, Seung-Ju;Lee, Bok-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.21 no.10
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    • pp.66-72
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    • 2007
  • This paper describes the characteristics of power loss and leakage currents flowing through new and used 18[kV] zinc oxide(ZnO) surge arrester under the mixed DC and AC voltages. The mixed DC and AC voltage generator of 50[kV] peak was designed and fabricated. The I-V curves of ZnO surge arrester were measured as a function of the voltage ratio K. The I-V curves under the mixed DC and AC voltages lay between the pure DC and AC characteristics, and the cross-over phenomenon in both I-V curves and R-V curves was observed at the low current region. As a result, the increase of DC component in the mixed voltages causes the increase of resistive component of total leakage current of ZnO surge arrester. Also, in the case of same applied voltage, the leakage current flowing through the used ZnO surge arrester was higher than that of the new ZnO surge arrester.

Design and Fabrication of a Ku-Band Planar Limiter with PIN Diodes (PIN 다이오드를 사용한 Ku 대역 평판형 리미터의 설계 및 제작)

  • Kim Tak-Young;Yang Seong-Sik;Yeom Kyung-Whan;Kong Deok-Kyu;Kim So-Su
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.4 s.107
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    • pp.368-379
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    • 2006
  • In this paper, the analytic design technique for a planar PIN diode limiter is presented rather than the conventional design heavily relying on the experiments. The novel analysis fur the PIN diode limiter shows the leakage is composed of two kinds of leakages and the relationship between the leakages and the PIN diode parameters. The designed limiter consists of 3 stages; the front two stages with two PM diodes and the final stage with Schottky diode pair. The fabricated limiter shows the insertion loss of 0.8 dB for the small input power, spike leakage of 12 Bm, flat leakage of 12 dBm for the 20 W RF power.

Suppression Method of Crosstalk Caused by Leakage of CB-CPW for MIMIC (MIMIC용 CB-CPW 전송선로의 누설 혼신의 억제 방법)

  • Yoon, Ho-Sung;Kim, Sung-Jin;Lee, Hai-Young
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.11
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    • pp.12-17
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    • 1999
  • In this paper, we proposed a novel CB-CPW(Conductor Backed CPW) for suppression of crosstalk caused by PPL(Parallel Plate Line) mode in the millimeter wave frequency. The proposed structure is formed by the GaAs main substrate attached on the Si lossy layer. The PPL mode can be suppressed by the Si lossy layer of conductivity ${\sigma}$, and it reduces the crostalk between the nearby transmission lines. Using 200 um thick Si substrate of ${\sigma}$ = 30S/m, as the lossy layer, the crosstalk can be suppressed below - 40 dB at 60 GHz. The proposed method is costly effective because inexpensive Si wafer is employed to suppress the PPL mode, and it can be used in the various types of millimeter wave applications.

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A Study on the ZVZCS Three Level DC/DC Converter without Primary Freewheeling Diodes (1차측 환류 다이오드를 제거한 ZVZCS Three Level DC/DC 컨버터에 관한 연구)

  • Bae, Jin-Yong;Kim, Yong;Baek, Soo-Hyun;Kwon, Soon-Do;Kim, Pil-Soo;Gye, Sang-Bum
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.16 no.6
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    • pp.66-73
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    • 2002
  • This paper presents ZVZCS(Zero-Voltage and Zero-Current Switching) Three Level DC/DC Converter without primary freewheeling diodes. The new converter presented in this paper used a phase shirt control with a flying capacitor in the primary side to achieve ZVS for the outer switches. A secondary anxiliary circuit which consists of one small capacitor, two small diodes and one coupled inductor, is added in the secondary to provide ZVZCS conditions to primary switches, ZVS for outer switches and ZCS for inner switches. Many advantages include simple secondary auxiliary circuit topology, high efficiency, and low cost make the new converter attractive for high power applications. Also the circulating current flows through the circuit so that it causes the needless coduction loss to be occurred in the devices and the transformer of the circuit The new converter has no primary auxiliary diodes for freewheeling current. The principle of operation, feature and design considerations are illustrated and verified through the experiment with a 1[㎾] 50[KHz]IGBT based experimental circuit.

Voltage Clamped Tapped-Inductor Boost Converter with High Voltage Conversion Ratio (고승압비를 갖는 전압 클램프 탭인덕터 부스트 컨버터)

  • Kang, Jung-Min;Lee, Sang-Hyun;Hong, Sung-Soo;Kim, Jin-Hwan;Oh, Dong-Sung;Han, Sang-Kyoo
    • Proceedings of the KIPE Conference
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    • 2011.07a
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    • pp.159-161
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    • 2011
  • 본 논문에서는 높은 승압비를 갖는 전압 클램프 탭인덕터 부스트 컨버터를 제안한다. 기존의 탭인덕터 부스트 컨버터 방식은 높은 승압비를 얻기 위해 사용되었던 탭인덕터로 인하여 일반적인 부스트 컨버터에 비해 주스위치와 다이오드의 전압스트레스가 크다는 단점이 있다. 또한, 누설 인덕터 성분과 기생 캐패시터로 인해 발생하는 공진 전압을 없애기 위해 손실스너버를 사용함으로 전력변환효율이 떨어지는 단점을 갖는다. 반면, 제안된 방식은 손실 스너버 없이 전압 클램핑 캐패시터를 사용하고 있다. 이 캐패시터는 기존의 탭인덕터 부스트컨버터의 주스위치 및 다이오드의 전압 스트레스를 줄이는 기능을 제공하게 된다. 본 논문에서는 제안된 부스트 컨버터의 동작원리를 이론적으로 해석하고, 모의실험을 통해 제안된 회로의 타당성을 검증하였다.

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