• Title/Summary/Keyword: 내장 시스템

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Implementation of FMCW Radar Signal Processing Module Using MPC5775K (MPC5775K를 이용한 FMCW 레이더 신호처리부 구현)

  • Seo, Min-kyo;Oh, Woojin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.05a
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    • pp.684-685
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    • 2017
  • FMCW radar, which is widely used as a front collision warning system for vehicles, is now being commercialized. In this study we develope the radar signal processing system using MPC5775K that is specialized for high performance ADAS. That has special features for ADAS such as 10Msps 12bit ADC, 50MHz Radix-4 FFT, CTE(Cross Triggering Engine) for synchronized triggering between DAC and ADC. The baseband processing board is implemented and shows the result in Matlab.

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Design of First-Aid Service Support System based on Mobile Motion Recognition (모바일의 모션 인식 기반의 응급 처치 서비스 지원 시스템의 설계)

  • Park, Hung-bog;Seo, Jung-hee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.10a
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    • pp.286-287
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    • 2018
  • As the number of single-person households is increasing in Korea, the demand for emergency support networks for the elderly and women is also growing. To meet the need, systemic solutions, such as a wide distribution of cell phones with embedded motion sensors that can alert the first responders or police in case of health or safety crisis, are regarded as critical issues. This paper introduces a design which registers the user's motions to process emergency reports via a mobile app running in the background. The method offers an affordable solution to reporting emergencies taking place both indoors and outdoors as it does not require an addition of hardware but only simple hand gestures.

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Implementation of a 32-Bit RISC Core for Portable Terminals (휴대 단말기용 32 비트 RISC 코어 구현)

  • Jung, Gab-Cheon;Park, Seong-Mo
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.38 no.6
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    • pp.82-92
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    • 2001
  • This paper describes implementation of an embedded 32-Bit RISC core for portable communication/information equipment, such as cellular phones, PDA(Personal Digital Assistants), notebook, etc. The RISC core implements the ARM$\circled$V 4 instruction set, operates with typical 5-stage pipeline. It supports Thumb code to improve the code density, and uses the dynamic power management method of pipeline registers. It was modeled and simulated in RTL level using VHDL, and verified with ARMulator of ADS (Arm Developer Suite) and had average CPI of 1.44. The core is synthesized automatically using the cell library based on $0.6{\mu}m$ CMOS 1-poly 3-metal CMOS technology. It consists of about 41,000 gates and the clock frequency is expected to be above 45 MHz.

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Study on the characteristics of stripline resonator in the variation of metal content and grain size (도체 페이스트의 메탈 함량 및 입자 크기에 따른 스트립라인 레조네이터 특성 연구)

  • 유찬세;조현민;이우성;강남기;박종철
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2002.11a
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    • pp.159-163
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    • 2002
  • So far, many kinds of researches on the chip components and MCM-C RF module especially on the 3-dimensional ceramic module using embedded passives have been performed. LTCC system has many kinds of advantages, like low loss, low cost of process, stability of process etc..The electrical behaviors of components are affected by that of the material systems including dielectrics and conductors. In this study, many kinds of conductor pastes in the variation with metal content and grain size are fabricated and their effect on the characteristics of stripline resonator are examined upto 6 ㎓.

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Development of the Hybrid embedded IP-PBX (하이브리드 임베디드 IP-PBX 개발)

  • Kim, Sam-Taek
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.11 no.4
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    • pp.83-89
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    • 2011
  • Nowadays, Internet Telephony Services based on SIP are gaining an explosive increase for general user. Thus a various demands of the user about convenience of IP-PBX are growing. The most important requirements of these is hybrid IP telephony system which is connected not only internet telephone but also general PSTN telephone. Therefore, in this paper, we have developed Hybrid IP-PBX connected all type of telephony terminals for small office. We have developed FXS module for connecting all type and FXO for using PSTN telephone number also. This Hybrid IP-PBX that is can be connected Soft-phone provide various optional services. We measured voice quality and test simultaneous calling for proof of validity.

Automated Test Data Generation for Testing Programs with Flag Variables Based on SAT (SAT를 기반으로 하는 플래그 변수가 있는 프로그램 테스팅을 위한 테스트 데이터 자동 생성)

  • Chung, In-Sang
    • The KIPS Transactions:PartD
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    • v.16D no.3
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    • pp.371-380
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    • 2009
  • Recently, lots of research on automated test data generation has been actively done. However, techniques for automated test data generation presented so far have been proved ineffective for programs with flag variables. It can present problems when considering embedded systems such as engine controllers that make extensive use of flag variables to record state information concerning devices. This paper introduces a technique for generating test data effectively for programs with flag variables. The presented technique transforms the test data generation problem into a SAT(SATisfiability) problem and makes advantage of SAT solvers for automated test data generation(ATDG). For the ends, we transform a program under test into Alloy which is the first-order relational logic and then produce test data via Alloy analyzer.

A Study on Implementation of LED Smart Card built-in Flexible Ultra-thin Speaker of Piezoelectric (압전방식의 플렉시블 초박형 스피커가 내장된 LED 스마트카드 구현에 관한 연구)

  • Yu, Hyeungkeun;Lee, JungHoon;Lee, Jongsung;Jang, Yeongmin;Cha, Jaesang;Lee, Kangwon
    • Journal of Satellite, Information and Communications
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    • v.8 no.2
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    • pp.1-5
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    • 2013
  • Recently, the spread of a variety of electronic card is using as credit cards, transportation cards, passports, driver's licenses, public phone card, and etc. LED smart cards need to raise application technique because variety of LED smart cards increasing supply and usage. in this paper, we propose a LED smart card contained inside the card that piezoelectric method flexible Ultra-thin speaker. and a melody flows when User using the LED smart card.. Therefore we are verified to useful through develop to electronic card that was designed system circuit and implemented circuit add in ultra-thin flexible Speaker based on piezoelectric.

요트 계류장의 운동측정 장치 개발과 평가 결과

  • Im, Jeong-Bin;Kim, Dae-Hui;Jo, Su-San;Jo, Yu-Gyeong;Mun, Ji-Ung;Park, Hye-Ri;Lee, Sang-Hun;Gwon, Do-Eon;Park, Eun-Seon;Jo, Ha-Ram
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 2012.10a
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    • pp.148-150
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    • 2012
  • 바람이나 파도에 의해서 요트 계류장과 요트 사이 또는 요트 계류장과 계류장 사이에는 충격이 발생하는데, 이러한 충격으로 인하여 계류장 또는 요트가 파손되거나 전복된다. 특히, 방파제 없이 외해에 설치한 요트 계류장은 이러한 위기에 항상 노출되어 있어 이에 대한 대책이 시급한 실정이다. 논문에서는 요트 계류장의 롤링, 히브, 핏칭 등의 운동을 측정하기 위한 하드웨어의 구축과 평가에 관해서 기술하였다. 하드웨어는 MEMS 기반 자이로와 가속도계 등의 관성 센서를 내장한 반도체 센서 SD746을 이용하여 구축하였고, 구축한 하드웨어를 이용하여 소형 요트 계류장에서 발생할 수 있는 운동을 수작업으로 생성하여 측정 및 평가하였다. 실험결과 x-축, y-축, z-축 등 3축 가속도와 3축 각속도 측정이 가능하여 요트 계류장의 운동 상태 모니터링이 가능함을 알았다. 본 연구는 추후 요트 계류장의 위기상태를 평가하고 통보하기 위한 시스템 구축에 이용할 예정이다.

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Speed control system design using dual core DSP(TMS320F28377D) for the 2 Axis BLDC motor control (2축 BLDC 전동기 제어를 위한 듀얼코어 DSP(TMS320F28377D)를 이용하는 속도 제어 시스템 설계)

  • Lee, Dong-ju;Kim, Hee-chel;Lee, Dong-hyun;Choi, Jung-keyng
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.10a
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    • pp.232-234
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    • 2017
  • In this research, the BLDC motor 2 axis controller was designed using a dual core processor. The controller used TMS320F28377D which is TI's latest dual-core DSP, and the BLDC motor was selected with the position of resolver having high reliavility and the speed sensor built-in type motor.

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HW/SW co-design of H.264/AVC Decoder using ARM-Excalibur (ARM-Excalibur를 이용한 H.264/AVC 디코더의 HW/SW 병행 설계)

  • Jung, Jun-Mo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.7
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    • pp.1480-1483
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    • 2009
  • In this paper, the hardware(HW) and software(SW) co-design methodology of H.264/AVC decoder using ARM-Excalibur is proposed. The SoC consists of embedded processor, memory, peripheral device and logic circuits. Recently, the co-design method which designs simultaneously HW and SW part is a new paradigm in SoC design. Because the optimization for partitioning the SoC system is very difficult, the verification must be performed earlier in design flow. We designed the H.264 and AVC Decoder using co-design method. It is shown that, for the proposed co-design method, the performance improvements can be obtained.