• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.3
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• pp.547-553
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• 2004

Linux is the one of various RTOS, also embedded linux has being studied with focus on technical stability and commercial utilities. In this paper, the technical trial was discussed on the development of real-time operating system that provides real time capability and extends the network communications ability and would be applied to the maritime mobile communication system through analysis the embedded linux kernel. Some techniques for Analyzing the embedded linux kernel and designing the target board, making the kernel image and porting the kernel are summarized in this paper.

• The Magazine of the Society of Air-Conditioning and Refrigerating Engineers of Korea
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• v.35 no.3
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• pp.67-78
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• 2006

• Journal of the Institute of Convergence Signal Processing
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• v.20 no.3
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• pp.118-124
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• 2019

Recently, the industrial field has been changed to the smart factory system based on information and communication technology (ICT) in order to improve productivity, quality and customer satisfaction. The most important machine to realize the smart factory is the AGV(automatic guided vehicle) and the adoption of AGV is increasing. Generally, AGV is developed using general purpose PLC(Programmable Logic controller), but the price of AGV is expensive and its volume is large. On the other hand, the industrial field due to space constraints in the workplace is required the low cost AGV which can be minimization, expansion of function, and easily reconfiguration. Therefore, in order to solve these problems, this study is proposed a design method of AGV controller with built-in PLC, and evaluated its performance. In the results of the experimentation, it showed good performance (speed control error = 0.021[m/s], posture control error=2.1[mm]) for the speed and posture control. In this way, when applying the proposed AGV controller in this study to the industrial filed, it is possible to reduce the size and reconfigure at low cost.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.12
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• pp.13-22
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• 1998

In this paper, we propose a high-performance BICS(built-in current sensor) which is fabricated in 0.8${\mu}{\textrm}{m}$ single-poly two-metal process for IDDQ testing of CMOS VLSI circuit. The CUT(circuit under test) is 4-bit full adder with a bridging fault. Using two nMOSs that have different size, two bridging faults that have different resistance values are injected in the CUT. And controlling a gate node, we experimented various fault effects. The proposed BICS detects the faulty current at the end of the clock period, therefore it can test a CUT that has a much longer critical propagation delay time and larger area than conventional BICSs. As expected in the HSPICE simulation, experimental results of fabricated chip demonstrated that the proposed BICS can exactly detect bridging faults in the circuit.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.421-422
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• 2012

본 논문은 넓은 범위에서 변화하는 입력 전압과 출력 전류 조건에서 동작하는 공진형 직류-직류 컨버터의 디지털 제어기 해석 및 설계에 대해 기술한다. LLC 직렬 공진형 컨버터의 전력 변환단 동 특성을 기반으로 디지털 제어기를 해석 및 설계하고, DSP 기능을 내장한 16 비트 마이크로 컨트롤러를 이용하여 제어기를 구현한다. 개발된 디지털 제어기를 150W 공진형 컨버터 보드에 적용하여 설계 이론을 실험적으로 검증하고, 종래의 아날로그 제어기를 적용한 컨버터와의 장단점과 동 특성을 비교 검증한다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.5
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• pp.1058-1067
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• 2004

Java virtual machine provides code compactness, simple execution engines, and platform-independence which are important features for small devices such as mobile or embedded device, but it has a big problem, such as low throughput due to stack-oriented operation. In this paper hardware lava accelerator targeted for mobile or embedded application is designed to eliminate the slow speed problem of lava virtual machine. The designed lava accelerator can execute 81 instructions of Java virtual machine(JVM)'s opcodes and be used as Java coprocessor of conventional 32-bit RISC processor with efficient coprocessor interface and instruction buffer. It consists of about 14,300 gates and its maximum operating frequency is about 50 Mhz under 0.35um CMOS technology.

• Proceedings of the Korean Nuclear Society Conference
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• 1996.05d
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• pp.275-282
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• 1996

일체형 원자로는 증기발생기 및 가압기를 압력용기 내에 설치한 것으로서 연결배관이 없기 때문에 배관의 파단에 의한 대형 냉각재 상실사고를 근원적으로 배제하고 전체계통을 단순화 시킬 수 있다. 증기발생기는 대부분 관류식으로서 일체식과 모듈식이 사용되고 있다. 본 연구에서는 모듈식 나선형 증기발생기를 사용한 일체형 신형경수로의 예비 개념설계를 수행하였다. 가압기는 원자로 내에 별도의 용기를 설치하는 내장형 자기가압기를 채택하였다. 제어봉 구동장치는 핵분열 반응열을 이용한 원자로 기동을 위하여 반응도를 미세하게 조정하는 것이 가능하고 지진하중과 같은 동하중의 영향을 최소화하기 위하여 원자로용기 외부로의 돌출부분을 최소화하는 설계개념을 채택하였다. 냉각재 펌프는 Canned Motor Pump를 원자로용기 상부에 수직으로 직접 부착하는 개념을 사용하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.7
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• pp.493-502
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• 2001

This paper propose a new built-in current sensor(BICS) for current testing that has some advantages compared with conventional logic testing. The designed BICS detects the fault in circuit under test (CUT) and makes a Pass/Fail signal by comparison between CUT current and duplicated inverter current. The proposed circuit consists of a differential amplifier, a comparator and a inverter. It requires 10 MOSFETs and 3 inverters. Since the designed BICS do not require the extra clock, the added extra pin is only one output pin. The mode selection is not used in this circuit. Therefore we can apply the circuit to on-line testing. The validity and effectiveness are verified through the HSPICE simulation of circuits with defects. When CUT is a 8$\times$8 parallel multiplier, area overhead of the BICS is about 4.34%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.4A
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• pp.447-457
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• 2004

This paper proposes a RSA crypto-processor for embedded systems. The architecture of the RSA crypto-processor should be used relying on Big Montgomery algorithm, and is supported by configurable bit size. The RSA crypto-processor includes a RSA control signal generator, an optimal Big Montgomery processor(adder, multiplier). We use diverse arithmetic unit (adder, multiplier) algorithm. After we compared the various results, we selected the optimal arithmetic unit which can be connected with ARM core-processor. The RSA crypto-processor was implemented with Verilog HDL with top-down methodology, and it was verified by C language and Cadence Verilog-XL. The verified models were synthesized with a Hynix 0.25${\mu}{\textrm}{m}$, CMOS standard cell library while using Synopsys Design Compiler. The RSA crypto-processor can operate at a clock speed of 51 MHz in this worst case conditions of 2.7V, 10$0^{\circ}C$ and has about 36,639 gates.

• Proceedings of the KIEE Conference
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• 2008.09a
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• pp.149-152
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• 2008

본 논문에서는 전압 및 전류보호, 주파수보호, 순간정전, 순간전압 저하보호 및 단독운전 기능 등 보호기능을 통합한 지능형 보호 및 제어기를 내장한 30kW급 태양광 인버터의 실 계통 연계시험을 통해서 지능형 보호기기의 성능 및 효용성을 입증하고 보급 확대를 도모하고자 지능형 보호 및 제어 기능을 내장한 30kW급 태양광 인버터를 제작하고, 그 보호성능 시험을 위한 성능 시스템을 구성하여 실계통 연계 보호성능 시험을 수행하여 그 결과를 토대로 중소명 건물용 지능형 태양광 인버터 계통연계 보호기능에 대한 효용성의 입증을 통해 현장 적용 가능성을 입증하였다.