• Title/Summary/Keyword: 고속 패킷 전송

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A study on the receive buffer control schemes for bobile multimedia services (이동 멀티미디어 서비스를 위한 수신버퍼 제어에 관한 연구)

  • 이태훈;김용득
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.4
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    • pp.940-949
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    • 1998
  • The paper proposes an effective mechanism hiring the adaptive buffer control schemes on the mobile seceiver's side that can resolve the problems of delay spikes caused by the handover process onthe cell boundaries when they transmit real-time moving images through the high speed wireless channels. to confirm the effectiveness of the proposed schemes, we have modeled the characteristics of the random errors on the wireless channels, the burst errors and that of the transmission delay by the handover. We also compared the rate of the delay-adaptation of the receive buffers caused by the delay and delay spikes. the comparison was done by testing the suggested schemes against the existing schemes by applying tehm to the packet delay model. We also could identify the noticable reduction of the casesof buffer delay and overflow compared with the conventional schemes, by applying the suggested algorithm to the video image compressed by H.263.

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Development of Advanced DSRC Packet Communication Technology (차세대 DSRC 패킷 통신 기술 개발)

  • Lee Hyun;Park In-Seong;Shin Chang-Sub;Oh Hyun-Seo;Yim Choon-Sik;Cho Kyoung-Rok
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.2 no.1 s.2
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    • pp.93-100
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    • 2003
  • In this farer, An ADSRC(Advanced Dedicated Short Range Communication) packet communication system developed by ETRI is introduced. The ADSRC system has been developed to provide high-speed, short-range wireless racket communication in roadside environment for mobile office services. The requirements of the ADSRC system for mobile office services and the system design specification to meet them with regard to mobile of nce environment are discussed. The ADSRC packet communication systems consist of the MAC(Medium Access Control) Processor block the OFDM() modem block and the RF block. The MAC processor block handles medium access control. The OFDM modem transmits data packets at up to 24Mbps adaptively and recovers the data from RF block. The ADSRC packet communication system architecture is described.

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Design and Implementation of MDDI Protocol for Mobile System (모바일 시스템을 위한 MDDI 프로토콜 설계 및 구현)

  • Kim, Jong-Moon;Lee, Byung-Kwon;Jung, Hoe-Kyung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.5
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    • pp.1089-1094
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    • 2013
  • In this study, we propose how th implement a MDDI(Mobile Display Digital Interface) protocol packet generation method in software. MDDI protocol is widely used in mobile display device. MDDI protocol packets are generated by software within micro processor. This method needs the minimum hardware configuration. In order to implementation of this method, we design a hardware platform with a high performance microprocessor and a FPGA. The packets generated by software within microprocessor are converted into LVDS signals, and transmitted by hardware within FPGA. This study suggests the benefits of the way how software can easily create a variety of packet. But, this proposed method takes more time in packet transmission compared to the traditional method. This weakness remains as a future challenge, which can be soon improved.

The Study on the Adactive H-ARQ Technique in TD-CDMA 3G System (TD-CDMA 3G 시스템의 적응형 H-ARQ 기법들에 관한 연구)

  • Suk, Kyung-Hyu;Park, Sung-Ho
    • The Journal of the Korea institute of electronic communication sciences
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    • v.5 no.4
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    • pp.450-456
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    • 2010
  • In the high-speed packet service, next generation mobile communication system has emerged as a major feature. If the fire of these high-speed kit services and non-continuous transmission of data due to the symmetrical nature of daeyiteo traffic for D-CDMA system has been actively studied. Small amounts of data moving in the uplink, but the real-time video downlink transmission, such as downloading large files to move data and services to those with asymmetric traffic characteristics, a system that can efficiently handle the data requirements be. Of 3GPP TDD(Time Division Duplex) scheme based on CDMA and TDMA in a way by introducing the concept through the proper allocation of time slots that can handle asymmetric traffic efficiently, has an advantage. TD-CDMA system by considering the characteristics of the frame configuration of transmission methods, such as physical channel structure and channel coding has been investigated. In addition, the HARQ scheme TD-CDMA system performance is analyzed by comparing them.

Linux Based QoServer Development Supporting Multimedia Data In High Speed Network Environment (고속 네트워크 환경에서 멀티미디어 데이터를 지원하는 리눅스 기반 QoServer 개발)

  • 윤여훈;김태윤
    • Proceedings of the Korean Information Science Society Conference
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    • 2001.10c
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    • pp.451-453
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    • 2001
  • 오늘날 네트워크의 대역특이 커지고 동시에 실시간 처리를 요하는 다양한 멀티미디어 애플리케이션들이 생성되고 있다. 그러나 문제는 고속 LAN 환경에서 많은 사용자들이 멀티미디어 애플리케이션들을 비롯한 다양한 네트워크 서비스들을 사용하고 있지만, WAN 환경으로의 선로로 전송하는데 있어서의 차별화가 없다는 것이다 따라서 경성 실시간(hard real time) 처리를 요하는 멀티미디어 데이터 들의 시간 제한을 지켜줄 수 없고, 비교적 지연시간의 제약을 받지 않는 HTML, FTP, e-Mail, 등의 연성 실시간(soft real time) 처리를 요하는 애플리케이션들에 대해 불필요한 대역폭 낭비를 일으킨다. 이러한 문제를 최소화하기 위해 본 논문에서는 엔터프라이즈 네트워크 등과 같은 고속 네트워크 망을 사용하는 환경에서 다양한 멀티미디어 데이터 패킷들을 고정적으로 할당된 대역폭에 따라 우선적으로 서비스되도록 하여 지연시간 제한을 최대한 보장해 주기 위한 리눅스 상에서 구현된 QoServer 개발 기술을 소개한다.

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A Study on the Flow Control Based Estimated Receiving Capacity on the Video Conference System (화상회의 시스템에서 수신능력 예측을 이용한 흐름제어에 관한 연구)

  • 김상진;남지승
    • Journal of Korea Multimedia Society
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    • v.6 no.3
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    • pp.488-495
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    • 2003
  • With the development of networks, multimedia communication has expanded its application field. From the remote control for household electric appliances to medicine, games, video conferencing and multimedia chatting, multimedia communication is being used in all parts of our lives. This multimedia communication requires the transmission of a lot of data at high speed. But if the transmission rate of the communication network exceeds the processing speed of being used in the high speed network environment, a bottleneck occurs in each node and deteriorates the performance of the network. This is the main reason for the slow speed of data transmission and packet loss. In this paper, considering the client's processing performance, reception performance was predicted and the way of flow control was shown. The computing performance of relevant Processor and its performance was estimated through the actual implementation.

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Horizontal Protocol Processing Architecture for High Performance Parallel Processing (고성능 병렬 처리를 위한 수평적인 프로토콜 처리 구조)

  • Kim, Pyeong-Jung;Park, Chi-Hang
    • The Transactions of the Korea Information Processing Society
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    • v.3 no.6
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    • pp.1386-1396
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    • 1996
  • In the distributed multimedia application, high throughput and low delay is one of the most important QoS(Quality of Service) requirement. Emerging high speed communication offers transmission rate above Gbps, but it can not be utilized efficiently by the performance bottlenecks of communication protocols. To overcom the problem, we propose a horizontal processing architecture that processes data as soon as it arrive from the network. Unfortunately, the OSI protocol stack often imposes ordering constraints that prevent concurrent processing of the protocol layers. By using a fixed packet format, the network layer through the presentation layer are processed in parallel. Our prototype shows that the proposed model has performance improvement up to 61% more advantage than the conventional approach.

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A New Multipath Interference Mitigation Technique for High Speed Data Transmission in WCDMA Downlink (WCDMA 순방향 링크에서의 고속 데이터 전송을 위한 다중 경로 간섭 완화 기법)

  • 유현규;한상철;정성순;홍대식;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.12A
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    • pp.958-963
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    • 2003
  • Increasing throughput using high order data modulations in the WCDMA downlink requires the elimination of multipath interferences. For this reason, Kenichi Higuchi proposed a multipath interference canceller in WCDMA downlink. However, this paper considers the downlink signal models that only contains code channels for which code information is known to the receiver. WCDMA systems contain code channels for other active users whose code information is unknown to the receiver and these code channels degrade the performance of the multipath interference canceller. Thus, this paper proposes a multipath interference mitigation scheme which removes multipath interference induced by all the code channels within a cell. Simulation results show that the proposed scheme outperforms both the RAKE receiver and the multipath interference canceller in the WCDMA downlink.

A Design of The PHB Mapping Model for Combining Services with DiffServ in The MPLS Network (멀티 프로토콜 레벨 스위칭망에서 DiffServ와의 서비스 결합을 위한 PHB 매핑모델 설계)

  • Moon, Suk-Hwa;Lee, Sung-Hwa
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.11 no.2
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    • pp.127-133
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    • 2011
  • This study proposed the PHB mapping model for combining services with DiffServ in the MPLS network capable of high-speed switching, and the effective differential bandwidth service model in the MPLS network on the basis of the proposed mapping model. The result of simulation on the service model using PRI showed that the transmission rate was achieved as much as the assigned bandwidth regardless of the increase of traffic as far as the EF PHB did not exceed the assigned bandwidth at the peak rate when the overall traffic increased.

An implementation of video transmission modes for MIPI DSI bridge IC (MIPI DSI 브릿지 IC의 비디오 전송모드 구현)

  • Seo, Chang-sue;Kim, Gyeong-hun;Shin, Kyung-wook;Lee, Yong-hwan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.291-292
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    • 2014
  • High-speed video transmission modes of master bridge IC are implemented, which supports MIPI (Mobile Industry Processor Interface) DSI (Display Serial Interface) standard. MIPI DSI master bridge IC sends RGB data and various commands to display module (slave) in order to test it. The master bridge IC consists of buffers storing video data of two lines, packet generation block, and D-PHY layer that distributes packets to data lanes and transmits them to slave. In addition, it supports four bpp (bit per pixel) formats and three transmission modes including Burst and Non-Burst (Sync Events, Sync Pulses types). The designed bridge IC is verified by RTL simulations showing that it functions correctly for various operating parameters.

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