• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.3
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• pp.570-576
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• 2007

In this study, the characteristics of metal-ferroelectric-semiconductor FET (MFSFET) device is investigated using field-dependent polarization and square-law FET models. From drain current with the gate voltage variation, when coercive voltages of ferroelectric thin film are 0.5 and 1V, the memory windows are 1 and 2V, respectively. When the gate voltages are 0, 0.1, 0.2 and 0.3V, the difference of saturation drain currents of the MFSFET device at two threshold voltages in ID-VD curve are 1.5, 2.7, 4.0, and 5.7mA, respectively. As a result of the analysis for drain currents after tine lapse, which is based on the simulation for hysteresis loop and the fitting of retention properties of ferroelectric thin films such as PLZT(10/30/70), PLT(10) and PZT(30/70) thin film shows excellent reliability that the decrease of saturation current is about 18% after 10 years.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.7
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• pp.1209-1217
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• 2008

In this paper, we present a new bit-parallel multiplier for performing the bit-parallel multiplication of two polynomials in the finite fields $GF(2^m)$. Prior to construct the multiplier circuits, we consist of the vector code generator(VCG) to generate the result of bit-parallel multiplication with one coefficient of a multiplicative polynomial after performing the parallel multiplication of a multiplicand polynomial with a irreducible polynomial. The basic cells of VCG have two AND gates and two XOR gates. Using these VCG, we can obtain the multiplication results performing the bit-parallel multiplication of two polynomials. Extending this process, we show the design of the generalized circuits for degree m and a simple example of constructing the multiplier circuit over finite fields $GF(2^4)$. Also, the presented multiplier is simulated by PSpice. The multiplier presented in this paper use the VCGs with the basic cells repeatedly, and is easy to extend the multiplication of two polynomials in the finite fields with very large degree m, and is suitable to VLSI.

• Journal of Korea Foundry Society
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• v.42 no.6
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• pp.331-336
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• 2022

In this study, we investigated the casting designs for fuel tank valves for LPG automobiles. The valves we studied have two cavities inside the part. There is inevitable air entrapment inside the cavities. In order to reduce this kind of casting defect, we carried out computer simulations of molten metal flow during the diecasting process of the target products. The main process parameters were the ingate position, product direction, and injection velocity. We also examined the possible use of vacuum diecasting. The position of the air entrapment was almost identical for all the ingate positions and product directions. We found that the change of the injection velocity affects the position of the air entrapment. In case of vacuum diecasting, the position of the air entrapment was similar to the previous cases, but it is expected that the air entrapment will be highly reduced in a real situation due to the vacuumed space.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.4
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• pp.31-40
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• 2016

In vehicular ad-hoc networks (VANETs), vehicles sense information on emergency incidents (e.g., accidents, unexpected road conditions, etc.) and propagate this information to following vehicles and a server to share the information. However, this process of emergency message propagation is based on multiple broadcast messages and can lead to broadcast storms. To address this issue, in this work, we use a novel approach to detect the vehicles that are farthest away but within communication range of the transmitting vehicle. Specifically, we discuss a signal-to-noise ratio (SNR)-based linear back-off (SLB) scheme where vehicles implicitly detect their relative locations to the transmitter with respect to the SNR of the received packets. Once the relative locations are detected, nodes that are farther away will set a relatively shorter back-off to prioritize its forwarding process so that other vehicles can suppress their transmissions based on packet overhearing. We evaluate SLB using a realistic simulation environment which consists of a NS-3 VANET simulation environment, a software-based WiFi-IP gateway, and an ITS server operating on a separate machine. Comparisons with other broadcasting-based schemes indicate that SLB successfully propagates emergency messages with latencies and hop counts that is close to the experimental optimal while reducing the number of transmissions by as much as 1/20.

• Journal of KIISE:Information Networking
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• v.34 no.6
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• pp.466-474
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• 2007

Asymmetric networks that the downlink bandwidth is larger than the uplink bandwidth may cause the degradation of the TCP performance due to the uplink congestion. In order to solve this problem, this paper designs and implements the Dynamic Segment Size Control mechanism which offers a suitable segment size for current networks. The proposed mechanism does not require any changes in customer premises but suppress the number of ACKs using segment reassembly technique to avoid the uplink congestion. The gateway which adapted the Dynamic Segment Size Control mechanism, detects the uplink congestion condition and dynamically measures the bandwidth asymmetric ratio and the packet loss ratio. The gateway reassembles some of segments received from the server into a large segment and transmits it to the client. This reduces the number of corresponding ACKs. In this mechanism, the SACK option is used when occurs the bit error during the transmission. Based on the simulation in the GEO satellite network environment, we analyzed the performance of the Dynamic Segment Size Control mechanism.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.336-339
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• 2011

In the RTLS(Real Time Location Based System), in case of existing a number of moving target, extremely complecated data flow is can be occurred. In the network where single gateway exists, various data which was collected from sensor node is transmitted along the simple route as time goes by. In case of multi-gateway configuration, the collected data is transmitted through diverse routes rather than simple route. This kind of data causes jams on nodes and this brings down the performance of the network. Different from existing studies, in this thesis, MAC (Media Access Control) protocol which minimizes data collision between nodes and guarantees QoS(Quality of Service) is suggested, in order to communicate efficiently in multi-gateway underwater sensor network environment. In the suggested protocol, source node which wants to transmit data makes a channel reservation to a number of destination node using a RTS packet. Source node reserves a channel without collision, by scheduling CTS response time using expected delay information from neighbor nodes. Once the reservation is made, source node transmit data packet without collision. This protocol analyzes/estimates the performance compared to a method provided from existing studies via simulation. As a results of the analysis, it was comfirmed that the suggested method has better performance, such as efficiency and delay.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.11
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• pp.44-52
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• 2011

In this article, we present a QoS-guaranteed IP mobility management scheme of Internet service for fast moving vehicles with multiple wireless network interfaces. The idea of the proposed mechanism consists of two things. One is that new wireless connections are established to available wireless channels whenever the measured data rate at the vehicle equipped with mobile gateway drops below to the required data rate of the user requirement. The other is that parallel distribution packet tunnels between an access router and the mobile gateway are dynamically constructed using multiple wireless network interfaces in order to guarantee the required data rate during the mobile gateway's movement. By doing these methods, the required data rate of the mobile gateway can be preserved while eliminating the possible delay and packet loss during handover operation, thus resulting in the guaranteed QoS. The architecture of the IETF standard HMIPv6 has been extended to realize the proposed scheme, and detailed algorithms for the extension of HMIPv6 has been designed. Finally, simulation has been done for performance evaluation, and the simulation results show that the proposed mechanism demonstrates guaranteed QoS during the handover with regard to the handover delay, packet loss and throughput.

• Proceedings of the Materials Research Society of Korea Conference
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• 2009.05a
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• pp.20.1-20.1
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• 2009

반도체 소자 제조 공정 프로그램인 T-suprem4와 MEDICI를 이용하여 NMOS구조를 설계 하였다. MOS 소자 시뮬레이션을 통해 식각 공정에서 생기는 언더컷에 의한 전기적 특성을 I-V 곡선으로 비교하여 분석하였다. NMOS 구조는 반도체 소자 제조 공정 프로그램 T-suprem4를 이용하여 기본 소자 구조를 설계하였다. 실험의 변수로는 첫째, 소자 공정 중 폴리 실리콘의 언더컷 식각의 각도를 $70^{\circ}C$부터 $110^{\circ}C$까지 $10^{\circ}C$의 차이로 설계하였다. 또한, 언더컷에 의한 드레인-소스사이의 전류($I_{DS}$) 손실이 없는 유효한 각도를 확인하기 위해 $80^{\circ}C$부터 $100^{\circ}C$까지는 $2^{\circ}C$ 크기로 설계 하였다. 둘째, 게이트 크기를 축소하고 역시 언더컷 식각의 각도를 다양하게 설계하였다. 설계된 소자를 반도체 소자 특성 분석 프로그램 MEDICI를 이용하여 소자의 전기적 특성을 측정하였다. 우선 NMOS소자 게이트에 2V의 전압을 인가하였다. 그리고 드레인 부분에 전압을 인가하여 그에 따른 드레인의 전류를 측정 하였다. 드레인 전압은 0V 부터 변화시키며 인가하였다. 측정된 전류 값으로 I-V 곡선을 나타내었다. I-V 곡선의 분석을 통해 식각 후 언더컷의 각도가 $70^{\circ}C$, $80^{\circ}C$, $110^{\circ}C$ 일 때 $4\times10^{-8}A/{\mu}$의 전류가 흐르고, $90^{\circ}C$, $100^{\circ}C$ 일 때는 $1.8\times10^{-7}A/{\mu}$의 전류가 흐르는 것을 확인 하였다. $80^{\circ}C$에서 $100^{\circ}C$까지는 $2^{\circ}C$ 크기로 측정한 결과 $88^{\circ}C$에서 $100^{\circ}C$ 사이 일 때 $90^{\circ}C$ 각도의 경우와 같이 $1.8\times10^{-7}A/{\mu}$의 전류가 측정 되었다. 즉, 식각 중 수직 측벽 도에 언더컷이 $10^{\circ}C$이상 발생하면 $I_{DS}$ 전류 값이 약 22%로 감소하였다. 또한 일반적으로 $90^{\circ}C$의 수직측벽을 가지는 공정이 중요하다고만 생각 되었지만, 이번 연구를 통하여 식각 후 측벽의 각도가 $88^{\circ}C$에서 $92^{\circ}C$ 사이에 있을 때 $I_{DS}$ 값이 가장 최대가 되는 것을 확인 할 수 있었다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.8 s.338
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• pp.17-24
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• 2005

This paper proposes a Decision Feedback Equalizer (DFT) with an error feedback filter for blind channel equalization. The proposed equalizer uses Least Mean Square(LMS) Algorithm and Multi-Modulus Algorithm (MMA), and has been designed for 64/256 QAM constellations. The existing MMA equalizer uses either two transversal filters or feedforward and feedback filers, while the proposed equalizer uses feedforward, feedback and error feedback filters to improve the channel adaptive performance and to reduce the number of taps. The proposed equalizer has been simulated using the $SPW^{TM}$ tool and it shows performance improvement. It has been modeled by VHDL and logic synthesis has been performed using the $0.25\;\mu m$ Faraday CMOS standard cell library. The total number of gates is about 190,000 gates. The proposed equalizer operates at 15 MHz. In addition, FPGA vertification has been performed using FPGA emulation board.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.6 no.3
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• pp.168-173
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• 2013

In this paper, we tried different two approach to improve the performance of the IGBT. The first approach is that adding N+ region beside P-base in the conventional IGBT. It can make the conventional IGBT to get faster turn-off time and lower conduction loss. The second approach is that adding P+ region on right side under gate to improve latching current of conventional IGBT. The device simulation results show improved on-state, latch-up and switching characteristics in each structure. The first one was presented lower voltage drop(3.08V) and faster turn-off time(3.4us) than that of conventional one(3.66V/3.65us). Also, second structure has higher latching current(369A/?? ) that of conventional structure. Finally, we present a novel IGBT combined the first approach with second one for improved trade-off characteristic between conduction and turn-off losses. The proposed device has better performance than conventional IGBT.