• Korean Journal of Materials Research
• /
• v.11 no.5
• /
• pp.427-430
• /
• 2001

We prepared 10cm-diameter Si(100)/500 $\AA$-Si$_3$N$_4$/Si(100) wafer Pairs adopting 500 $\AA$ -thick Si$_3$N$_4$layer as insulating layer between single crystal Si wafers. Si3N, is superior to conventional SiO$_2$ in insulating. We premated a p-type(100) Si wafer and 500 $\AA$ -thick LPCVD Si$_3$N$_4$∥Si (100) wafer in a class 100 clean room. The cremated wafers are separated in two groups. One group is treated to have hydrophobic surface and the other to have hydrophilic. We employed a FLA(fast linear annealing) bonder to enhance the bond strength of cremated wafers at the scan velocity of 0.1mm/sec with varying the heat input at the range of 400~1125W. We measured bonded area using a infrared camera and bonding strength by the razor blade crack opening method. We used high resolution transmission electron microscopy(HRTEM) to probe cross sectional view of bonded wafers. The bonded area of two groups was about 75%. The bonding strength of samples which have hydrophobic surface increased with heat input up to 1577mJ/$m^2$ However, bonding strength of samples which have hydrophilic surface was above 2000mJ/$m^2$regardless of heat input. The HRTEM results showed that the hydrophilic samples have about 25 $\AA$ -thick SiO layer between Si and Si$_3$N$_4$/Si and that maybe lead to increase of bonding strength.

• Korean Journal of Materials Research
• /
• v.16 no.1
• /
• pp.30-36
• /
• 2006

A novel method was proposed to grow an epitaxial $CoSi_2$ on (100)Si substrate. A $CoN_x$ interlayer was deposited by reactive sputtering of Co in an Ar+$N_2$ flow. From the Ti/Co/$CoN_x$/Si structure, a uniform and thin $CoSi_2$ layer was epitaxially grown on (100)Si by annealing above $700^{\circ}C$. Two amorphous layers were found at the $CoN_x$/Si interface, where the top layer has a silicon nitride (Si-N) bonding state with some Co content and the bottom layer has a Co-Si intermixing state. The SiNx amorphous layer seems to play a critical role of suppressing the diffusion of Co into Si substrate for the direct formation of epitaxial $CoSi_2$.

• Journal of Korean Vacuum Science & Technology
• /
• v.6 no.3
• /
• pp.133-138
• /
• 2002

The growth of Au films grown on a Si(100)-2x1 surface and Si films on a Ge(100)-2x1 substrate is studied using Positron-annihilation induced Auger Electron Spectroscopy(PAES), Electron induced Auger Electron Spectroscopy(EAES), and Low Energy Electron Diffraction(LEED). Previous work has shown that PAES is almost exclusively sensitive to the top-most atomic layer due to the trapping of positrons in an image potential well just outside the surface before annihilation. This surface specificity is exploited to profile the surface atomic concentrations during the growth of Au on Si(100) and Si on Ge(100) and EAES provides concentrations averaged over the top 3-10 atomic layers simultaneously. The difference in the probe-depth makes us possible to use PAES and EAES in a complementary fashion to estimate the surface and near surface concentration profiles. The results show that (i) the intermixing of Au and Si atoms occurs during the room temperature deposition, (ii) the segregated Ge layer is observed onto the Si layers deposited at 300k. In addition, the prior adsorption of hydrogen prevents the segregation of Ge on top of the deposited Si and that the hydrogen adsorption is useful in growing a thermally stable structure.

• Proceedings of the Korean Magnestics Society Conference
• /
• 2009.12a
• /
• pp.136-137
• /
• 2009

• Journal of the Korean Vacuum Society
• /
• v.16 no.6
• /
• pp.433-438
• /
• 2007

We fabricated thin films of Au and Ta/Au with thicknesses of 30 nm and 5 nm/30nm, respectively on Si(100) or Si(111) substrates using a dc magnetron sputtering system. Grain sizes, roughness and conductivity for Au thin films are measured as a function of the annealing temperatures. We observed that the grain size of samples enlarged and the surface became rougher with increasing annealing temperature. The grain size and roughness were improved in the structure of Si/Ta/Au than Si/Au. Furthermore, the Si(100) substrate was more effective for decreasing the resistance for Ta/Au system than Si(111) substrate. We confirm that by inserting a Ta buffer layer in Si(100)/Au, surface roughness was reduced and by adjusting the annealing temperature the grain size were enlarged. Consequently, the Au thin-film has improved conductivity.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.02a
• /
• pp.116-116
• /
• 2011

오늘날 표시장치는 경량, 고밀도, 고해상도 대면적화의 요구에 의해 TFT-LCD의 발전이 이루어졌다. TFT에는 반도체 재료로서, Poly-Si을 사용하는 Poly-Si TFT와 a-Si:H를 이용하는 a-Si;H TFT가 있는데 a-Si는 $350^{\circ}C$ 이하의 저온으로 제작이 가능하여 많이 사용되고 있다. 이러한 방향에 맞추어 bottom gate 구조의 a-Si TFT 실험을 진행하였다. P-type silicon substrate ($0.01{\sim}0.02{\Omega}-cm$)에 gate insulator 층인 SiNx (SiH4 : NH3 = 6:60)를 200nm 증착하였다. 그리고 그 위에 active layer 층인 a-Si (SiH4 : H2 : He =2.6 : 10 : 100)을 다른 RF power를 적용하여 100 nm 증착하였다. 그 위에 Source와 Drain 층은 Al 120 nm를 evaporator로 증착하였다. active layer, gate insulator 층은 ICP-CVD 장비를 이용하여 증착하였으며, 공정온도는 $300^{\circ}C$ 로 고정하였다. active layer층 증착시 RF power는 100W, 300W, 500W, 600W로 가변하였고, width/length는 100 um/8um로 고정하였다. 증착한 a-Si layer층을 Raman spectroscope, SEM 측정 하였으며, TFT 제작 후, VG-ID, VD-ID 측정을 통해 전기적 특성인 Threshold voltage, Subthreshold swing, Field effect mobility, ON/OFF current ratio를 비교해 보았다.

• Journal of the Korean Ceramic Society
• /
• v.36 no.8
• /
• pp.863-870
• /
• 1999

SOI(silicon on insulafor) was fabricated through the direct bonding using (100) Si wafer and 4$^{\circ}$off (100) Si wafer to investigate the stacking faults in silicon at the Si/SiO2 oxidized and bonded interface. The treatment time of wafer surface using MSC-1 solution was varied in order to observe the effect of cleaning on bonding characteristics. As the MSC-1 treating time increased surface hydrophilicity was saturated and surface microroughness increased. A comparison of surface hydrophilicity and microroughness with MSC-1 treating time indicates that optimum surface modified condition for time was immersed in MSC-1 for 2 min. The SOI structure directly bonded using (100) Si wafer and 4$^{\circ}$off (100) Si wafer at the room temperature were annealed at 110$0^{\circ}C$ for 30 min. Then the stacking faults at the bonding and oxidation interface were examined after the debonding. The results show that there were anomalies in the gettering of the stacking faults at the bonded region.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.15 no.11
• /
• pp.953-957
• /
• 2002

Single crystal 3C-SiC (cubic silicon carbide) thin-films were deposited on Si(100) wafer up to the thickness of 4.3 ${\mu}{\textrm}{m}$ by APCVD (atmospheric pressure chemical vapor deposition) method using HMDS (hexamethyildisilane; ｛CH$_{3}$｝$_{6}$ Si$_{2}$) at 135$0^{\circ}C$. The HMDS flow rate was 0.5 sccm and the carrier gas flow rate was 2.5 slm. The HMDS flow rate was important to get a mirror-like crystal surface. The growth rate of the 3C-SiC film was 4.3 ${\mu}{\textrm}{m}$/hr. The 3C-SiC epitaxial film grown on Si(100) wafer was characterized by XRD (X-ray diffraction), AFM (atomic force microscopy), RHEED (reflection high energy electron diffraction), XPS (X-ray photoelecron spectroscopy), and Raman scattering, respectively. Two distinct phonon modes of TO (transverse optical) near 796 $cm^{-1}$ / and LO (longitudinal optical) near 974$\pm$1 $cm^{-1}$ / of 3C-SiC were observed by Raman scattering measurement. The heteroepitaxially grown film was identified as the single crystal 3C-SiC phase by XRD spectra (2$\theta$=41.5。).).

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.02a
• /
• pp.383-383
• /
• 2010

Gas-phase hydrogen atoms create a variety of chemical and physical phenomena on Si surfaces: adsorption, abstraction of pre-adsorbed H, Si etching, Si amorphization, and penetration into the bulk lattice. Thermal desorption/evolution analyses exhibited three distinct peaks, including one from the crystalline bulk. It was previously found that thermal-energy gaseous H(g) atoms penetrate into the Si(100) crystalline bulk within a narrow substrate temperature window(centered at ~460K) and remain trapped in the bulk lattice before evolving out at a temperature as high as ~900K. Developing and sustaining atomic-scale surface roughness, by H-induced silicon etching, is a prerequisite for H absorption and determines the $T_s$ windows. Issues on the H(g) absorption to be further clarified are: (1) the role of the detailed atomic surface structure, together with other experimental conditions, (2) the particular physical lattice sites occupied by, and (3) the chemical nature of, absorbed H(g) atoms. This work has investigated and compared the thermal H(g) atom absorptivity of Si(100), Si(111) and Si(110) samples in detail by using the temperature programmed desorption mass spectrometry (TPD-MS). Due to the differences in the atomic structures of, and in the facility of creating atom-scale etch pits on, Si(100), (100) and (110) surfaces, the H-absorption efficiency was found to be larger in the order of Si(100) > Si(111) > Si(110) with a relative ratio of 1 : 0.22 : 0.045. This intriguing result was interpreted in terms of the atomic-scale surface roughening and kinetic competition among H(g) adsorption, H(a)-by-H(g) abstraction, $SiH_3(a)$-by-H(g) etching, and H(g) penetraion into the crystalline silicon bulk.

• Journal of the Korean Vacuum Society
• /
• v.19 no.5
• /
• pp.371-376
• /
• 2010

The GaAs epitaxial layers were grown on Si(100) substrates by molecular beam epitaxy (MBE) using the two-step method. The Si(100) substrates were cleaned with three different surface cleaning methods of vacuum heating, As-beam exposure, and Ga-beam deposition at the substrate temperature of $800^{\circ}C$ in the MBE growth chamber. Growth temperature and thickness of the GaAs epitaxial layer were $800^{\circ}C$ and $1{\mu}m$, respectively. The surface structure and properties were investigated by reflection high-energy electron diffraction (RHEED), AFM (Atomic force microscope), DXRD (Double crystal x-ray diffraction), PL (Photoluminescence), and PR (Photoreflectance). From RHEED, the surface structure of GaAs epitaxial layer grown on Si(100) substrate with Ga-beam deposition is ($2{\times}4$). The GaAs epitaxial layer grown on Si(100) substrate with Ga-beam deposition has a high quality.