• Bulletin of the Korean Chemical Society
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• 제35권10호
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• pp.2895-2900
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• 2014

We fabricated quantum dot-sensitized solar cells (QDSSCs) using cadmium sulfide (CdS) and cadmium telluride (CdTe) quantum dots (QDs) as sensitizers. A spin coated $TiO_2$ nanoparticle (NP) film on tin-doped indium oxide glass and sputtered Au on fluorine-doped tin oxide glass were used as photo-anode and counter electrode, respectively. CdS QDs were deposited onto the mesoporous $TiO_2$ layer by a successive ionic layer adsorption and reaction method. Pre-synthesized CdTe QDs were deposited onto a layer of CdS QDs using a direct adsorption technique. CdS/CdTe QDSSCs had high light harvesting ability compared with CdS or CdTe QDSSCs. QDSSCs incorporating single-walled carbon nanotubes (SWNTs), sprayed onto the substrate before deposition of the next layer or mixed with $TiO_2$ NPs, mostly exhibited enhanced photo cell efficiency compared with the pristine cell. In particular, a maximum rate increase of 24% was obtained with the solar cell containing a $TiO_2$ layer mixed with SWNTs.

• 한국표면공학회지
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• 제24권1호
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• pp.25-30
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• 1991

The evaporation characteristics of Ag, Al, Au, Cr. Cu, In, Mg, Mn, Pb, Pd, Si, SiO, Sn, Ti and Zn with the various resistive heating sources have been studied. The employed sources are refractory metal (Mo, Ta and W) boats, W-wire, ceramic (usually Al2O3)-coated and -barriered refractory metal boats, and special boats such as baffled boats and intermetallic boats (nitride compound and graphite). We investigated the melting mode, evaporation rate at a specific power, and lifetime of the sources. A special boat holder is also discussed which is needed to cool the sources at a large heat capacity.

• 대한금속재료학회지
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• 제48권7호
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• pp.667-673
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• 2010

Copper filling into TSV (through-silicon-via) and reduction of the filling time for the three dimensional chip stacking were investigated in this study. A Si wafer with straight vias - $30\;{\mu}m$ in diameter and $60\;{\mu}m$ in depth with $200\;{\mu}m$ pitch - where the vias were drilled by DRIE (Deep Reactive Ion Etching) process, was prepared as a substrate. $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. In order to reduce the time required complete the Cu filling into the TSV, the PPR (periodic pulse reverse) wave current was applied to the cathode of a Si chip during electroplating, and the PR (pulse-reverse) wave current was also applied for a comparison. The experimental results showed 100% filling rate into the TSV in one hour was achieved by the PPR electroplating process. At the interface between the Cu filling and Ti/ Au functional layers, no defect, such as a void, was found. Meanwhile, the electroplating by the PR current showed maximum 43% filling ratio into the TSV in an hour. The applied PPR wave form was confirmed to be effective to fill the TSV in a short time.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.331-331
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• 2009

Hafnium oxide ($HfO_2$) attracted by one of the potential candidates for the replacement of si-based oxides. For applications of the high-k gate dielectric material, high thermodynamic stability and low interface-trap density are required. Furthermore, the amorphous film structure would be more effective to reduce the leakage current. To search the gate oxide materials, metal-insulator-metal (MIM) capacitors was fabricated by pulsed laser deposition (PLD) on indium tin oxide (ITO) coated glass with different oxygen pressures (30 and 50 mTorr) at room temperature, and they were deposited by Au/Ti metal as the top electrode patterned by conventional photolithography with an area of $3.14\times10^{-4}\;cm^2$. The results of XRD patterns indicate that all films have amorphous phase. Field emission scanning electron microscopy (FE-SEM) images show that the thickness of the $HfO_2$ films is typical 50 nm, and the grain size of the $HfO_2$ films increases as the oxygen pressure increases. The capacitance and leakage current of films were measured by a Agilent 4284A LCR meter and Keithley 4200 semiconductor parameter analyzer, respectively. Capacitance-voltage characteristics show that the capacitance at 1 MHz are 150 and 58 nF, and leakage current density of films indicate $7.8\times10^{-4}$ and $1.6\times10^{-3}\;A/cm^2$ grown at 30 and 50 mTorr, respectively. The optical properties of the $HfO_2$ films were demonstrated by UV-VIS spectrophotometer (Scinco, S-3100) having the wavelength from 190 to 900 nm. Because films show high transmittance (around 85 %), they are suitable as transparent devices.

• 마이크로전자및패키징학회지
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• 제18권4호
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• pp.49-53
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• 2011

TSV(through-silicon-via)를 이용한 3차원 Si 칩 패키징 공정 중 전기 도금을 이용한 비아 홀 내 Cu 고속 충전과 범핑 공정 단순화에 관하여 연구하였다. DRIE(deep reactive ion etching)법을 이용하여 TSV를 제조하였으며, 비아홀 내벽에 $SiO_2$, Ti 및 Au 기능 박막층을 형성하였다. 전도성 금속 충전에서는 비아 홀 내 Cu 충전율을 향상시키기 위하여 PPR(periodic-pulse-reverse) 전류 파형을 인가하였으며, 범프 형성 공정에서는 리소그라피(lithography) 공정을 사용하지 않는 non-PR 범핑법으로 Sn-3.5Ag 범프를 형성하였다. 전기 도금 후, 충전된 비아의 단면 및 범프의 외형을 FESEM(field emission scanning electron microscopy)으로 관찰하였다. 그 결과, Cu 충전에서는 -9.66 $mA/cm^2$의 전류밀도에서 60분간의 도금으로 비아 입구의 도금층 과성장에 의한 결함이 발생하였고, -7.71 $mA/cm^2$에서는 비아의 중간 부분에서의 도금층 과성장에 의한 결함이 발생하였다. 또한 결함이 생성된 Cu 충전물 위에 전기 도금을 이용하여 범프를 형성한 결과, 범프의 모양이 불규칙하고, 균일도가 감소함을 나타내었다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 1998년도 제14회 학술발표회 논문개요집
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• pp.24-24
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• 1998

반도체장비를 포함하는 초고진공장비의 園훌化가 급속히 그리고 절실히 요구되고 있는 것이 현실정이다. 當面해서 실현할 국산진공장비의 대상은 廣範圍하다. 즉, 각종 진공 pump ( (rotary, dry, diffusion, cryo, ion, turbo melecular pump), 진공 chamber, 진공 line, gate valve 를 위 시 한 진공 V머ve, flange, gasket, fl않d야lU, mainpulater 퉁 진공 部品이 다. 진공계 의 핵심 은 適切하고 優良한 진공재료의 선태파 사용이다. 진공장비는 사용자가 원하는 진공도를 원하 는 시간 동안 륨空度를 유지해 주어야 한다. 진공재료 선태의 기준사항은:(1) 기체의 透過성 (2) 薰했훌 (3) 혔體放出특성 - -outgassing과 degassing- (4) 機械的 량훌度 (5) 온도 의존성 (6) 化學톡성 (7) 加I성 및 鎔接 성 (8) 課電특성 (9) 磁氣특성 (10) 高速함子 및 放射線 특성 (11) 經濟성 및 調達생 둥이 다. 우량한 초고진공계재료는 풍부하게 개발되어 왔고, 또 新材料들이 개발되고 있다. 여기에서는 주로 초고진공 내지는 극고진공계의 構造材料, 機能材料, 部品材料 일반파 몇가지 신재료의 특 성에 관해서 記述한다. M Mild SteeHSAE, 1112, 1010, 1020, 1022, etc)., S Stainless SteeHAlSI, 304, 304L, 310, 316, 321, 347): 구조재료, chamber, fl하1ges A Aluminum과 Alloys (1060, 1100, 2014, 4032, 6(뻐1): 구조재료, chamber, flanges, gaskets A AI, Al 떠loy는 SS에 代替하는 역 할올 시 작하고 있다. C Copper, Copper Alloys(C11$\alpha$)0, C26800, C61400, Cl7200): 내장인자, gasket, cryopanel, tubing T Titanium, Ziriconium, Haf띠um 및 Alloys: 특히 Ti은 10n pump 용 getter material 이 외 에 U UHV,XHV용 chamber계로서 관심올 끌고 있다. N Nickel, Nickel Alloys (200, 204, 211, monel, nichrome): 부식 방지 , 전자장치 , 자기 장치 귀 금속(Ag, Au, Pt, Pd, Rh, Ir, Os, Ru): 보조부품, gasket, filament, coating, thermocouple, 접 합부위 T TiC, SiC, zrC, HfC, TaC 둥의 탄화물과, BN, TiN, AlN 동의 질화물, 붕화물이 둥장하고 었 다. 유리: Soda Lime, Borosilicate, Potash Soda Lead: View Port, Chamber envelope C Ceramics: AlZ03, BeO, MgO, zrOz, SiOz, MgOzSiOz, 3Alz032SiOz, Z$textsc{k}$hSiOz S상N4: e electrical, thermal insulators, crucibles, boats, single crystals, sepctr려 windows 저자는 최근 저자들이 발견한 Zr-Ti-Cu-Ni-Be amorphous alloys coated cham뾰r가 radiation p proof로 이용될 수 있는 사실을 점검하고 었다 .. Z.Y. Hua 들은 Cs3Sb를 새로운 photocathode 재료로 보고하고 있다.

• 대한금속재료학회지
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• 제50권2호
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• pp.152-158
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• 2012

The effect of current waveform on Cu filling into TSV (through-silicon via) and the bottom-up ratio of Cu were investigated for three dimensional (3D) Si chip stacking. The TSV was prepared on an Si wafer by DRIE (deep reactive ion etching); and its diameter and depth were 30 and $60{\mu}m$, respectively. $SiO_2$, Ti and Au layers were coated as functional layers on the via wall. The current waveform was varied like a pulse, PPR (periodic pulse reverse) and 3-step PPR. As experimental results, the bottom-up ratio by the pulsed current decreased with increasing current density, and showed a value of 0.38 on average. The bottom-up ratio by the PPR current showed a value of 1.4 at a current density of $-5.85mA/cm^2$, and a value of 0.91 on average. The bottom-up ratio by the 3-step PPR current increased from 1.73 to 5.88 with time. The Cu filling by the 3-step PPR demonstrated a typical bottom-up filling, and gave a sound filling in a short time.

• 대한금속재료학회지
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• 제49권5호
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• pp.388-394
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• 2011

High speed copper filling into TSV (through-silicon-via) for three dimensional stacking of Si chips was investigated. For this study, a tapered via was prepared on a Si wafer by the DRIE (deep reactive ion etching) process. The via had a diameter of 37${\mu}m$ at the via opening, and 32${\mu}m$ at the via bottom, respectively and a depth of 70${\mu}m$. $SiO_2$, Ti, and Au layers were coated as functional layers on the via wall. In order to increase the filling ratio of Cu into the via, a PPR (periodic pulse reverse) wave current was applied to the Si chip during electroplating, and a PR (pulse reverse) wave current was applied for comparison. After Cu filling, the cross sections of the vias was observed by FE-SEM (field emission scanning electron microscopy). The experimental results show that the tapered via was filled to 100% at -5.85 mA/$cm^2$ for 60 min of plating by PPR wave current. The filling ratio into the tapered via by the PPR current was 2.5 times higher than that of a straight via by PR current. The tapered via by the PPR electroplating process was confirmed to be effective to fill the TSV in a short time.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.489.2-489.2
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• 2014

The planar type flexible piezoelectric energy harvesters (PEH) based on PbZr0.52Ti0.48O3 (PZT) thin films on the flexible substrates are demonstrated to convert mechanical energy to electrical energy. The planar type energy harvesters have been realized, which have an electrode pair on the PZT thin films. The PZT thin films were deposited on double side polished sapphire substrates using conventional RF-magnetron sputtering. The PZT thin films on the sapphire substrates were transferred by PDMS stamp with laser lift-off (LLO) process. KrF excimer laser (wavelength: 248nm) were used for the LLO process. The PDMS stamp was attached to the top of the PZT thin films and the excimer laser induced onto back side of the sapphire substrate to detach the thin films. The detached thin films on the PDMS stamp transferred to adhesive layer coated on the flexible polyimide substrate. Structural properties of the PZT thin films were characterized using X-ray diffraction (XRD) and scanning electron microscopy (SEM). To measure piezoelectric power generation characteristics, Au/Cr inter digital electrode (IDE) was formed on the PZT thin films using the e-beam evaporation. The ferroelectric and piezoelectric properties were measured by a ferroelectric test system (Precision Premier-II) and piezoelectric force microscopy (PFM), respectively. The output signals of the flexible PEHs were evaluated by electrometer (6517A, Keithley). In the result, the transferred PZT thin films showed the ferroelectric and piezoelectric characteristics without electrical degradation and the fabricated flexible PEHs generated an AC-type output power electrical energy during periodically bending and releasing motion. We expect that the flexible PEHs based on laser transferred PZT thin film is able to be applied on self-powered electronic devices in wireless sensor networks technologies. Also, it has a lot of potential for high performance flexible piezoelectric energy harvester.