• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.06a
• /
• pp.168-168
• /
• 2008

Dimension of a transistor has rapidly shrunk to increase the speed of device and to reduce the power consumption. However, it is accompanied with several problems like direct tunneling through the gate dioxide layer and low conductivity characteristic of poly-Si gate in nano-region. To cover these faults, study of new materials is urgently needed. Recently, high dielectric materials like $Al_2O_3$, $ZrO_2$, and $HfO_2$ are being studied for equivalent oxide thickness (EOT). However, poly-Si gate is not compatible with high-k materials for gate-insulator. Poly Si gate with high-k material has some problems such as gate depletion and dopant penetration problems. Therefore, new gate structure or materials that are compatible with high-k materials are also needed. TiN for metal/high-k gate stack is conductive enough to allow a good electrical connection and compatible with high-k materials. According to this trend, the study on dry etching of TiN for metal/high-k gate stack is needed. In this study, the investigations of the TiN etching characteristics were carried out using the inductively coupled $BCl_3$-based plasma system and adding $Cl_2$ gas. Dry etching of the TiN was studied by varying the etching parameters including $BCl_3$/Ar gas mixing ratio, RF power, DC-bias voltage to substrate, and $Cl_2$ gas addition. The plasmas were characterized by optical emission spectroscopy analysis. Scanning electron microscopy was used to investigate the etching profile.

• Korean Chemical Engineering Research
• /
• v.51 no.2
• /
• pp.214-220
• /
• 2013

Hydrophobic coating on a silicate-based yellow phosphor ($Sr_2SiO_4:Eu^{2+}$) was carried out by using hexamethyldisiloxane (HMDSO) precursor in an atmospheric pressure dielectric barrier discharge plasma reactor, eventually to improve the long-term stability and reliability of the phosphor. The phosphor powder samples were characterized by a scanning electron microscope (SEM), a transmission electron microscope (TEM), a fluorescence spectrophotometer and a contact angle analyzer. After the coating was prepared, the contact angle of the phosphor powder increased to $133.0^{\circ}$ for water and to $140.5^{\circ}$ for glycerol, indicating that a hydrophobic layer was formed on its surface. The phosphor coated with HMDSO exhibited photoluminescence enhancement up to 7.8%. The SEM and TEM images of the phosphor powder revealed that the plasma coating led to a morphological change from grain-like structure to smooth surface with 31~46 nm thick hydrophobic layer. The light emitting diode (3528 1 chip LED) fabricated with the coated phosphor showed a substantial enhancement in the reliability under a special test condition at $85^{\circ}C$ and 85% relative humidity for 1,000 h (85/85 testing). The plasma-mediated method proposed in this work may be applicable to the formation of 3-dimensional coating layer on irregular-shaped phosphor powder, thereby improving the reliability.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2004.07b
• /
• pp.869-873
• /
• 2004

[ $Sr_xBa_{1-x}Nb_2O_6$ ] (SBN, $0.25{\leq}x{\leq}0.75$) ceramic is a ferroelectric material with tetragonal tungsten bronze (TTB) type structure, which has a high pyroelectric coefficient, piezoelectric, and a photo refractive properties. In this study, SBN60(x=0.6) thin film was manufactured by ion beam sputtering technique. Using the prepared SBN60 target in $Ar/O_2$ atmosphere as-deposited SBN60 thin film on Pt(100)/$TiO_2/SiO_2/Si$ substrate crystallization and orientation behavior as well as electric properties of SBN60 thin film were examined. SBN60 deposition up to $3000{\AA}$ in thickness, SBN60 thin film was heat-treated at $650^{\circ}C{\sim}800^{\circ}C$. The orientation was shown primarily along (001) plane from XRD pattern where working pressure was $4.3{\times}10^{-4}$ torr. The deposited layer was uniform, preferred orientatin and crystallization behavior resulted in the change of $O_2$ ratio was observed. In electric propertie of Pt/SBN60/Pt thin film capacitor remnant polarization (2Pr) value was $10{\mu}C/cm^2$, the coercive filed (Ec) 50 kV/cm, and the dielectric constant 615, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.06a
• /
• pp.191-191
• /
• 2007

유효 산화막 두께가 약 2.0nm 정도의 $ZrO_2$ 절연막 위에 Ta-Mo 금속 합금과 Ru-Zr 금속 합금을 Co-sputtering 방법을 이용하여 여러 가지 일함수를 갖는 MOS capacitor를 제작하여 전기적 재료적 특성에 관하여 연구를 하였다. 그 결과 각각의 금속 합금 게이트는 4.1eV 에서 5.1eV 사이의 다양한 일함수를 나타냈으며, $400^{\circ}C$, $500^{\circ}C$, $600^{\circ}C$, $700^{\circ}C$, $800^{\circ}C$ RTA 후의 C-V특성 곡선 및 I-V 측정을 통하여 누설전류를 확인하였다. 그 결과 Ta-Mo 금속 합금의 경우 스퍼터링 파워가 100W/70W에서 NMOS에 적합한 일함수를 가졌으며, Ru-Zr 금속 합금의 경우 스퍼터링 파워가 50W/100W에서 NMOS에 적합한 일함수를 가졌다. 열처리 후의 C-V특성 곡선에서도 정전용랑 값이 거의 변하지 않았으며 평탄 전압의 변화도 거의 없었다. 누설전류 특성에서는 물리적 두께가 비슷한 기존의 $SiO_2$ 절연막에서 실험결과와 비교하여 약 100배 정도 감소되었음을 알 수 있었다. 또한 기존의 실험들에서 나타난 열처리 후의 $ZrO_2$ 절연막과 Si 기판 사이의 Interfacial layer 의 동반 두께 증가로 인한 전기적 특성 저하가 나타나지 않는 줄은 특성을 보여준다.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.9 no.3
• /
• pp.166-173
• /
• 2009

The reliability of hafnium oxide gate dielectrics incorporating lanthanum (La) is investigated. nMOSFETs with metal/La-doped high-k dielectric stack show lower $V_{th}$ and $I_{gate}$, which is attributed to the dipole formation at the high-k/$SiO_2$ interface. The reliability results well correlate with the dipole model. Due to lower trapping efficiency, the La-doping of the high-k gate stacks can provide better PBTI immunity, as well as lower charge trapping compared to the control HfSiO stacks. While the devices with La show better immunity to positive bias temperature instability (PBTI) under normal operating conditions, the threshold voltage shift (${\Delta}V_{th}$) at high field PBTI is significant. The results of a transconductance shift (${\Delta}G_m$) that traps are easily generated during high field stress because the La weakens atomic bonding in the interface layer.

• Journal of the Korean Vacuum Society
• /
• v.19 no.1
• /
• pp.14-21
• /
• 2010

Ge is one of the attractive channel materials for the next generation high speed metal oxide semiconductor field effect transistors (MOSFETs) due to its higher carrier mobility than Si. But the absence of a chemically stable thermal oxide has been the main obstacle hindering the use of Ge channels in MOS devices. Especially, the fabrication of gate oxide on Ge with high quality interface is essential requirement. In this study, $HfO_xN_y$ thin films were prepared by plasma-enhanced atomic layer deposition on Ge substrate. The nitrogen was incorporated in situ during PE-ALD by using the mixture of nitrogen and oxygen plasma as a reactant. The effects of nitrogen to oxygen gas ratio were studied focusing on the improvements on the electrical and interface properties. When the nitrogen to oxygen gas flow ratio was 1, we obtained good quality with 10% EOT reduction. Additional analysis techniques including X-ray photoemission spectroscopy and high resolution transmission electron microscopy were used for chemical and microstructural analysis.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.06a
• /
• pp.62-62
• /
• 2008

As micro-system move toward higher speed and miniaturization, requirements for embedding the passive components into printed circuit boards (PCBs) grow consistently. They should be fabricated in smaller size with maintaining and even improving the overall performance. Miniaturization potential steps from the replacement of surface-mount components and the subsequent reduction of the required wiring-board real estate. Among the embedded passive components, capacitors are most widely studied because they are the major components in terms of size and number. Embedding of passive components such as capacitors into polymer-based PCB is becoming an important strategy for electronics miniaturization, device reliability, and manufacturing cost reduction Now days, the dielectric films deposited directly on the polymer substrate are also studied widely. The processing temperature below $200^{\circ}C$ is required for polymer substrates. For a low temperature deposition, bismuth-based pyrochlore materials are known as promising candidate for capacitor $B_2Mg_{2/3}Nb_{4/3}O_7$ ($B_2MN$) multi layers were deposited on Pt/$TiO_2/SiO_2$/Si substrates by radio frequency magnetron sputtering system at room temperature. The physical and structural properties of them are investigated by SEM, AFM, TEM, XPS. The dielectric properties of MIM structured capacitors were evaluated by impedance analyzer (Agilent HP4194A). The leakage current characteristics of MIM structured capacitor were measured by semiconductor parameter analysis (Agilent HP4145B). 200 nm-thick $B_2MN$ muti layer were deposited at room temperature had capacitance density about $1{\mu}F/cm^2$ at 100kHz, dissipation factor of < 1% and dielectric constant of > 100 at 100kHz.

• Journal of the Korean Ceramic Society
• /
• v.43 no.11 s.294
• /
• pp.688-692
• /
• 2006

Ferroelectric lanthanides-substituted $Bi_4Ti_3O_{12}$ $(Bi_{4-x}Ln_xTi_3O_{12}, BLnT)$ thin films approximately 200 nm in thickness were deposited by metal organic chemical vapor deposition onto Pt(111)/Ti/SiO$_2$/Si(100) substrates. Many researchers reported that the lanthanides substitution for Bi in the pseudo-perovskite layer caused the distortion of TiO$_6$ octahedron in the a-b plane accompanied with a shift of the octahedron along the a-axis. In this study, the effect of lanthanides (Ln=Pr, Eu, Gd, Dy)-substitution and crystallization temperature on their ferroelectric properties of bismuth titanate $(Bi_4Ti_3O_{12}, BIT)$ thin films were investigated. As BLnT thin films were substituted to lanthanide elements (Pr, Eu, Gd, Dy) with a smaller ionic radius, the remnant polarization (2P$_r$) values had a tendency to increase and made an exception of the Eu-substituted case because $Bi_{4-x}Eu_xTi_3O_{12}$ (BET) thin films had the smaller grain sizes than the others. In this study, we confirmed that better ferroelectric properties can be expected for films composed of larger grains in bismuth layered peroskite materials. The crystallinity of the thin films was improved and the average grain size increased as the crystallization temperature,increased from 600 to 720$^{\circ}C$. Moreover, the BLnT thin film capacitor is characterized by well-saturated polarization-electric field (P-E) curves with an increase in annealing temperature. The BLnT thin films exhibited no significant degradation of switching charge for at least up to $1.0\times10^{11}$ switching cycles at a frequency of 1 MHz. From these results, we can suggest that the BLnT thin films are the suitable dielectric materials for ferroelectric random access memory applications.

• Korean Journal of Optics and Photonics
• /
• v.28 no.1
• /
• pp.28-32
• /
• 2017

In this research, we designed an LSPR sensor based on a thin-film multilayer comprising $TiO_2$ and $SiO_2$. The thickness of the overall substrate layer of the suggested multilayer LSPR sensor is limited to 100 nm, and the number of repeating $TiO_2$ and $SiO_2$ thin films is 1-4 within a limited thickness. Additionally, a nanowire structure with a gold thin film of 40 nm, height of 40 nm, period of 600 nm, and line width of 300 nm was formed on the multilayer. To design the variable wavelength-type SPR, the angle was fixed at $75^{\circ}$ and the wavelength was changed. We then simulated the system with the finite-element method (FEM) using Maxwell's equations. It was confirmed that the resonance wavelength became shorter as the number of multilayers increased when the refractive index was fixed. We found that the wavelength changes were more sensitive. However, no changes were observed when the number of the multilayers was three or higher.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.48 no.12
• /
• pp.35-41
• /
• 2011

In this paper, an analysis for a new substrate shielding symmetric coupled MIS structure consisting of grounded crossbar at the interface between Si and SiO2 layer using the Finite-Difference Time-Domain(FDTD) method is presented. In order to reduce the substrate effects on the transmission line characteristics, a shielding structure consisting of grounded crossbar lines over time-domain signal has been examined. Parameters of symmetric coupled MIS transmission line with various gaps between crossbars for even- and odd-mode are investigated as the functions of frequency, and the extracted distributed frequency-dependent transmission line parameters and corresponding equivalent circuit parameters as well as quality factor for the new MIS crossbar embedded structure are also presented. It is shown that the quality factor of the symmetric coupled transmission line can be improved without significant change in the characteristic impedance and effective dielectric constant.